RL Research Engineer — AI Silicon Design

Menlo Ventures; San Francisco (CA); Hybrid; USD 500,000 - 850,000; Full time

Benefits offered by this job

Equity donation

Generous vacation

Parental leave

Flexible hours

Office space

Job summary

Anthropic is hiring for the Code RL team within the RL organization. As a Research Engineer, you’ll advance our models’ ability to design silicon. Hardware design is difficult and unforgiving – exactly the sort of domain we want Claude to excel at.

You’ll leverage your chip design expertise and turn it into tasks and signals for models to learn from. Specifically, you will: Invent, design, and implement RL environments and evaluations for agentic RTL generation, design verification, and physical

Qualifications

• Bachelor’s degree in a relevant field (engineering or related).
• Experience with ASIC/FPGA design and RTL verification.
• Fluency with industry EDA tools and processes.
• Tape-out experience and going from spec to silicon.
• Balance between research exploration and engineering implementation.

Responsibilities

• Invent, design, and implement RTL design and verification environments for agentic RTL generation, design (including formal) verification, physical design optimization.
• Work on cross‑cutting RL considerations such as EDA‑tool latency optimization and proxy rewards.
• Conduct experiments and shape our roadmap.
• Deliver your work into research and production training runs.
• Collaborate with other researchers and engineers across and outside Anthropic.

Education

Bachelor's degree in engineering or related field

Tools

EDA tools

Job description

Anthropic is hiring for the Code RL team within the RL organization. As a Research Engineer, you’ll advance our models’ ability to design silicon. Hardware design is difficult and unforgiving – exactly the sort of domain we want Claude to excel at.

You’ll leverage your chip design expertise and turn it into tasks and signals for models to learn from. Specifically, you will: Invent, design, and implement RL environments and evaluations for agentic RTL generation, design verification, and physical