Research Engineer, Chip Design RL (Reinforcement Learning)

United States Digital Space LLC; San Francisco (CA); Hybrid; USD 500,000 - 850,000; Full time

Benefits offered by this job

Equity donation matching

Vacation and parental leave

Flexible working hours

Job summary

United States Digital Space LLC is hiring a Research Engineer for the Code RL team to advance chip design through reinforcement learning. The role focuses on designing silicon, with emphasis on RTL, verification, and physical design.

You will build RL environments, evaluate agentic design flows, and push research into production training runs. Strong candidates have ASIC/FPGA design experience, fluency with EDA tools, and a passion for safe, beneficial AI systems.

Qualifications

• Bachelor's degree in a field relevant to the role.
• Experience with RTL design and formal verification methods.
• Familiarity with EDA tools and chip design workflows.
• Goal-oriented with ability to balance research and engineering implementation.

Responsibilities

• Design, implement, and evaluate RL environments for chip design tasks (RTL, verification, physical design).
• Address cross-cutting RL concerns like EDA-tool latency and proxy rewards.
• Run experiments and help shape project roadmap.
• Deliver results into research and production training runs.
• Collaborate with researchers and engineers across teams.

Skills

ASIC design

FPGA design

RTL

UVM

Formal methods

PPA optimization

Education

Bachelor's degree

Tools

EDA tools

Place-and-route

Job description

About the company

the company’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems.

About the RL teams

Our Reinforcement Learning teams lead the company's reinforcement learning research and development, playing a critical role in advancing our AI systems. We’ve contributed to all Claude models, with significant impacts on the autonomy and coding capabilities of Claude Fable 5 and Opus 4.8. Our work spans several key areas:

• Developing systems that enable models to use computers effectively
• Advancing code generation through reinforcement learning
• Pioneering fundamental RL research for large language models
• Building scalable RL infrastructure and training methodologies
• Enhancing model reasoning capabilities

We collaborate closely with the company’s alignment and frontier red teams to ensure our systems are both capable and safe. We partner with the applied production training team to bring research innovations into deployed models, and are dedicated to implement our research at scale. Our Reinforcement Learning teams sit at the intersection of cutting‑edge research and engineering excellence, with a deep commitment to building high‑quality, scalable systems that push the boundaries of what AI can accomplish.

About the role

We’re hiring for the Code RL team within the RL organization. As a Research Engineer, you’ll advance our models’ ability to design silicon. Hardware design is difficult and unforgiving – exactly the sort of domain we want Claude to excel at.

You’ll leverage your chip design expertise and turn it into tasks and signals for models to learn from. Specifically, you will:

• Invent, design, and implement RL environments and evaluations for agentic RTL generation, design (including formal) verification, physical design optimization.
• Work on cross‑cutting RL considerations such as EDA‑tool latency optimization and proxy rewards.
• Conduct experiments and shape our roadmap.
• Deliver your work into research and production training runs.
• Collaborate with other researchers and engineers across and outside the company.

You may be a good fit if you:

• Have expertise in ASIC or FPGA design: RTL, design verification (UVM, formal methods, coverage‑driven), physical design (synthesis, place‑and‑route, timing closure), PPA optimization, DFT, ECOs.
• Are fluent with industry EDA tools and processes.
• Have taped out chips and have experience going from spec to silicon.
• Know how to balance research exploration with engineering implementation.
• Are passionate about AI’s potential and committed to developing safe and beneficial systems.

Strong candidates may also have:

• Experience with reinforcement learning, evaluations or environments.
• Built tooling or automation around chip design flows.
• Worked on ML accelerators or high‑performance compute hardware.
• Familiarity with high‑level synthesis or architecture simulators.

The annual compensation range for this role is listed below.

Annual Salary: \$500,000 — \$850,000 USD

Logistics

Minimum education: Bachelor’s degree or an equivalent combination of education, training, and/or experience

Required field of study: A field relevant to the role as demonstrated through coursework, training, or professional experience

Minimum years of experience: Years of experience required will correlate with the internal job level requirements for the position

Location-based hybrid policy: Currently, we expect all staff to be in one of our offices at least 25% of the time. However, some roles may require more time in our offices.

Visa sponsorship: We do sponsor visas! However, we aren’t able to successfully sponsor visas for every role and every candidate. But if we make you an offer, we will make every reasonable effort to get you a visa, and we retain an immigration lawyer to help with this.

We encourage you to apply even if you do not believe you meet every single qualification. Not all strong candidates will meet every single qualification as listed. Research shows that people who identify as being from underrepresented groups are more prone to experiencing imposter syndrome and doubting the strength of their candidacy, so we urge you not to exclude yourself prematurely and to submit an application if you’re interested in this work. We think AI systems like the ones we’re building have enormous social and ethical implications. We think this makes representation even more important, and we strive to include a range of diverse perspectives on our team.

Benefits

We offer competitive compensation and benefits, optional equity donation matching, generous vacation and parental leave, flexible working hours, and a supportive work environment.