RTL & Design Verification Engineer for AI Chips

Ricursive Intelligence; Palo Alto (CA); On-site; USD 100,000 - 150,000; Full time

Job summary

Ricursive Intelligence in Palo Alto is seeking engineers and researchers to join our frontier AI Lab. The role focuses on building self-improving systems, specifically in chip design, and offers the opportunity to tackle high-impact technical challenges alongside an elite team.

Successful candidates will have extensive experience in RTL and design verification, working hands-on to design algorithms and run experiments that aim to transform the chip development process.

Qualifications

• Real depth in RTL and design verification is required.
• Experience in designing algorithms and running large-scale experiments.

Responsibilities

• Design algorithms for chip development.
• Run large-scale experiments.
• Ship products that transform chip design.

Skills

RTL

Design verification

Algorithm design

Job description

Ricursive Intelligence in Palo Alto is seeking engineers and researchers to join our frontier AI Lab. The role focuses on building self-improving systems, specifically in chip design, and offers the opportunity to tackle high-impact technical challenges alongside an elite team.

Successful candidates will have extensive experience in RTL and design verification, working hands-on to design algorithms and run experiments that aim to transform the chip development process.