RISC-V ISS Engineer — High-Performance C++ & Verification

QUALCOMM, Inc.; Cupertino (CA); On-site; USD 176,000 - 263,000; Full time

Job summary

Qualcomm Technologies, Inc. is building a high-performance RISC-V Instruction Set Simulator (ISS) used as the gold reference model for next-gen 64-bit processors. You will implement ISA features, ensure correct fetch/decode/execute flow, and drive co-simulation with RTL.

The role blends architecture, systems software, and verification engineering with attention to bit-accurate correctness. Applicants should have strong C++ skills, familiarity with processor architecture, and exposure to

Qualifications

• Bachelor's degree with 4+ years in hardware or software engineering.
• Master's degree with 3+ years of relevant experience.
• PhD with 2+ years of relevant experience.

Responsibilities

• Implement the ISA by translating the RISC-V spec into C++.
• Maintain fetch/decode/execute engine and memory/privilege logic.
• Co-simulation with RTL; identify differences one instruction at a time.
• Develop tests to exercise features and verify results against the spec.
• Maintain a suite of simulator extensions and utilities.

Skills

C++ programming

Processor architecture

Python 3

GDB/ELF

Education

Bachelor's degree in EE/CS/CE

Master's degree (optional)

PhD (optional)

Tools

QEMU

Spike

gem5

Linux internals

Job description

Qualcomm Technologies, Inc. is building a high-performance RISC-V Instruction Set Simulator (ISS) used as the gold reference model for next-gen 64-bit processors. You will implement ISA features, ensure correct fetch/decode/execute flow, and drive co-simulation with RTL.

The role blends architecture, systems software, and verification engineering with attention to bit-accurate correctness. Applicants should have strong C++ skills, familiarity with processor architecture, and exposure to