Senior RISC-V ISA Simulator Engineer

Qualcomm

Cupertino (CA)

On-site

USD 167,000 - 251,000

Full time

14 days+

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Job summary

Qualcomm Technologies, Inc. in Cupertino is building a high-performance, production-grade RISC-V Instruction Set Simulator (ISS) that serves as the golden reference model for a family of next-generation 64-bit processors.

The role blends computer architecture and systems software, writing efficient C++ that is correct to the bit and fast enough to run long-running benchmarks and boot Linux. You will implement ISA extensions, maintain the fetch/decode/execute engine, support virtual memory and

Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware/Software/Systems Engineering experience.
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware/Software/Systems Engineering experience.
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware/Software/Systems Engineering experience.

Responsibilities

Translate RISC-V specification chapters into working C++ code with focus on wide extensions including integer, floating-point, vector, and security features.
Maintain fetch/decode/execute engine, memory protection, virtual memory, and privilege-level logic for a trustworthy reference.
Develop co-simulation harness to run ISS alongside RTL and verify differences one instruction at a time.
Write targeted unit tests and validate results against the RISC-V specification.
Contribute to simulator extensions and utilities to support the user community.