RISC‑V CPU Verification Fellow — High‑Performance Processor

Tenstorrent; California; Hybrid; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy for next-generation RISC‑V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post‑silicon validation.

This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels, with offers aligned to level reached during

Qualifications

• Verifying high‑performance superscalar CPUs, including out‑of‑order and speculative processors.
• Strong knowledge of RISC‑V ISA, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior.
• Proficiency in SystemVerilog, UVM, constrained‑random verification, assertions, functional coverage, and advanced debug methodologies.
• Hands‑on experience with CPU reference models, instruction generators, ISS‑based checking, or differential testing.
• Experience with formal verification and large‑scale CPU verification environments.

Responsibilities

• Own verification strategy for RISC‑V high‑performance superscalar CPUs and CPU subsystems.
• Drive verification planning for out‑of‑order, speculative, superscalar microarchitectures.
• Build and scale test plans, coverage, checkers, assertions, scoreboards, and constrained‑random environments.
• Verify key CPU features including frontend, branch prediction, rename, scheduling, execution, load‑store, memory ordering, cache hierarchy, retirement, exceptions, interrupts, debug, and coherency interactions.
• Partner with architecture, RTL, performance modeling, SoC, firmware, compiler, and validation teams while mentoring senior engineers and establishing best practices across the CPU verification organization.

Skills

CPU verification

RISC-V architecture

SystemVerilog

UVM

constrained-random verification

debug methodologies

Tools

SystemVerilog

UVM

Emulation

FPGA prototyping

Job description

Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy for next-generation RISC‑V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post‑silicon validation.

This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels, with offers aligned to level reached during