Remote Verification Lead — ASIC/FPGA, UVM & CRV

Fidus Systems; Austin (TX); Remote; USD 120,000 - 190,000; Full time

Benefits offered by this job

Medical Insurance

Dental Insurance

Vision Insurance

401(k) Matching

Profit Sharing Bonus

Remote work

Job summary

Fidus Systems is seeking an experienced Verification Designer to own block- and system-level verification for ASIC/FPGA designs. You will build UVM, formal, and assertion-based environments, drive coverage closure, and work closely with clients on verification strategy.

The role requests 8+ years of verification leadership, strong SystemVerilog/UVM expertise, and scripting skills (Python/Perl/Tcl). Fully remote with domestic and international travel opportunities, and a comprehensive benefits

Qualifications

• 8+ years in ASIC/FPGA verification with lead ownership.
• Strong SystemVerilog/UVM fluency and CRV techniques.
• Experience with coverage metrics, assertions, and formal methods.
• Familiarity with Ethernet, DDR/LPDDR, AXI, NoC, ARM subsystems.

Responsibilities

• Own block- and system-level verification from test plans to closure.
• Design and implement UVM, formal, and assertion-based environments.
• Develop behavioral models and write test cases to hit coverage goals.
• Debug failures in simulation/regressions and coordinate with teams.
• Automate verification tasks using scripting (Python/Perl/Tcl).
• Plan and report status on multiple verification activities as a lead.
• Collaborate with external clients on verification strategy.

Skills

SystemVerilog

UVM

CRV

Formal verification

Python

Perl

Tcl

Client-facing

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

cocoTB

pyUVM

DPI-C

Job description

Fidus Systems is seeking an experienced Verification Designer to own block- and system-level verification for ASIC/FPGA designs. You will build UVM, formal, and assertion-based environments, drive coverage closure, and work closely with clients on verification strategy.

The role requests 8+ years of verification leadership, strong SystemVerilog/UVM expertise, and scripting skills (Python/Perl/Tcl). Fully remote with domestic and international travel opportunities, and a comprehensive benefits