Remote DFT Engineer for SoCs/ASICs

Match Point Solutions; Menlo Park (CA); On-site; USD 69,000 - 96,000; Full time

Job summary

MatchPoint Solutions is seeking a DFT Engineer in Menlo Park to architect and implement DFT strategies for high-performance SoCs/ASICs. You will collaborate with front-end, physical design, verification, and product engineering teams to ensure high test coverage and strong silicon quality.

Required experience includes 3+ years in DFT, Verilog/SystemVerilog, ATPG/MBIST, and JTAG, with familiarity in industry tools such as SpyGlass, Tessent, Modus, or TetraMAX.

Qualifications

• 3+ years of hands-on DFT experience in advanced SoC/ASIC development nodes.
• Proficient in Verilog/SystemVerilog for DFT integration and debugging.
• Experience with ATPG/MBIST/JTAG and post-silicon support activities.

Responsibilities

• Define and implement comprehensive DFT architectures including Scan, ATPG, MBIST, and JTAG/IEEE standards.
• Perform Scan Chain Insertion and optimization for timing closure and power grid compatibility.
• Translate pre-silicon patterns to tester formats and support post-silicon bring-up.
• Collaborate with PTE teams to optimize test time and boost manufacturing yield.

Skills

Verilog/SystemVerilog

Scan Insertion

ATPG

MBIST

JTAG

Post-Silicon Support

Scripting (Tcl/Python/Perl)

Tools

SpyGlass DFT

Tessent

Modus

TetraMAX

Synopsys Design Compiler

Cadence Genus

Job description

MatchPoint Solutions is seeking a DFT Engineer in Menlo Park to architect and implement DFT strategies for high-performance SoCs/ASICs. You will collaborate with front-end, physical design, verification, and product engineering teams to ensure high test coverage and strong silicon quality.

Required experience includes 3+ years in DFT, Verilog/SystemVerilog, ATPG/MBIST, and JTAG, with familiarity in industry tools such as SpyGlass, Tessent, Modus, or TetraMAX.