DFT Engineer: High-Performance SoCs (Onsite Menlo Park)

Akaasa Technologies; Menlo Park (CA); On-site; USD 103,000 - 165,000; Part time

Job summary

Akaasa Technologies seeks an experienced DFT Engineer in Menlo Park, CA to define, architect, and execute robust Design-for-Test strategies for high‑performance SoCs and ASICs. You will collaborate with front-end, physical design, verification, product, and test teams to achieve high test coverage and enable efficient post-silicon manufacturing test.

The ideal candidate has hands-on experience with scan, ATPG, MBIST, JTAG/IEEE 1149.1, DFT validation, and post-silicon bring-up, plus strong

Qualifications

• 3+ years of hands-on DFT experience in advanced SoC/ASIC development.
• Strong Verilog/SystemVerilog for DFT integration and debugging.
• Experience with scan insertion, scan synthesis, and boundary scan.

Responsibilities

• Define, architect, and execute robust DFT strategies for high-performance SoCs and ASICs.
• Collaborate with front-end design, physical design, verification, product, and test teams to achieve high test coverage.
• Enable efficient post-silicon manufacturing test.

Skills

DFT engineering

Verilog/SystemVerilog

Scan insertion

Scan synthesis

Scan compression

Boundary scan

ATPG patterns

MBIST

JTAG/IEEE 1149.1

Post-silicon bring-up

Debugging & problem-solving

Collaboration across teams

Job description

Akaasa Technologies seeks an experienced DFT Engineer in Menlo Park, CA to define, architect, and execute robust Design-for-Test strategies for high‑performance SoCs and ASICs. You will collaborate with front-end, physical design, verification, product, and test teams to achieve high test coverage and enable efficient post-silicon manufacturing test.

The ideal candidate has hands-on experience with scan, ATPG, MBIST, JTAG/IEEE 1149.1, DFT validation, and post-silicon bring-up, plus strong