Principal SI Engineer: AI-Driven High-Speed Memory

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 170,000 - 230,000; Full time

Benefits offered by this job

Medical plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. in Boise seeks a Principal Signal Integrity Engineer to lead development and analysis of high-speed memory interfaces and PDN, applying AI/ML to accelerate SI/PI analyses and optimization.

You will collaborate with package, silicon, system engineering, product and marketing teams to ensure performance and help drive future standards (JEDEC, ONFI, IBIS) through electrical capability exploration.

Qualifications

• PhD or Master’s with significant industry experience in signal integrity and power integrity.
• Experience with electromagnetic field solvers and time/frequency domain tools.
• Strong background in high-speed I/O signaling and PCB layout.

Responsibilities

• Lead development and analysis of high-speed memory interfaces and PDN.
• Apply AI/ML and data-driven techniques to SI/PI analysis, optimization, and decision-making.
• Automate simulations and workflows to improve efficiency and coverage.
• Collaborate with package, silicon, system engineering, product, and marketing teams to ensure product performance.
• Drive SI/PI aspects of future standards (JEDEC, ONFI, IBIS) through exploration of electrical capability.
• Support external customers as needed and contribute to technique development for SI/PI analyses.

Skills

Signal Integrity

Power Integrity

Electromagnetic theory

Transmission line theory

AI/ML in engineering

Lab measurement proficiency

High-speed signaling

PCB layout knowledge

Differential/single-ended buses

Communication skills

Education

PhD or MSEE or equivalent

Tools

Q3D

SIWAVE

HFSS

POWERSI

CLARITY

HSPICE

ADS

JMP

Job description

Micron Technology, Inc. in Boise seeks a Principal Signal Integrity Engineer to lead development and analysis of high-speed memory interfaces and PDN, applying AI/ML to accelerate SI/PI analyses and optimization.

You will collaborate with package, silicon, system engineering, product and marketing teams to ensure performance and help drive future standards (JEDEC, ONFI, IBIS) through electrical capability exploration.