Principal High-Speed Analog IC Designer

Celero Communications, Inc.

United States

Remote

USD 200,000 - 300,000

Full time

30 hours ago
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Job summary

Celero Communications, Inc. is seeking a Principal High-Speed Analog Circuit Design Engineer to lead the design of high‑speed mixed‑signal circuits, transceivers and related analog blocks.

You will architect circuits for next‑gen interconnect technology and supervise layouts across advanced process nodes in a fast‑growing startup environment. You will drive system bring‑up, verification, and documentation, collaborating with a diverse team to deliver robust high‑performance solutions for AI

Qualifications

  • Master’s degree or PhD in Electrical Engineering or related field.
  • 5+ years of experience in analog design.
  • Proficient with Virtuoso, Spectre, ADE.
  • Experience with CMOS design/verification flows.
  • Familiar with EM simulation tools (EMX, Momentum, HFSS).
  • Strong communication and documentation skills.

Responsibilities

  • High speed analog circuit design for broadband amplifiers and related blocks.
  • Clock generation and distribution design (VCOs, PLLs, distribution).
  • Develop fundamental analog blocks (bandgap references, LDOs, temp sensors).
  • Explore new techniques for next-gen optical transceivers.
  • Design of custom passive components from concept to silicon.
  • Supervise analog layouts within advanced process nodes.
  • System verification and circuit design specifications
  • Silicon bring-up, debugging and support
  • Team communication and documentation

Skills

Analog design
High-speed design
CMOS design
EM simulation
Documentation

Education

Master’s or PhD in Electrical Engineering

Tools

Virtuoso
Spectre
ADE
Post-layout extraction
EMX
Momentum
HFSS

Job description

Celero Communications, Inc. is seeking a Principal High-Speed Analog Circuit Design Engineer to lead the design of high‑speed mixed‑signal circuits, transceivers and related analog blocks.

You will architect circuits for next‑gen interconnect technology and supervise layouts across advanced process nodes in a fast‑growing startup environment. You will drive system bring‑up, verification, and documentation, collaborating with a diverse team to deliver robust high‑performance solutions for AI

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