Principal EDA Engineer - Global Compute & Data Lead

Renesas Electronics Corp.; Chandler (AZ); On-site; USD 180,000 - 240,000; Full time

Job summary

Renesas Electronics seeks a Principal EDA/CAD Engineer to lead global compute and design-data-management environments. You will guide Linux-based engineering estates, define infrastructure requirements, and own Perforce/IPLM data-management methods across distributed teams.

The role combines hands-on CAD engineering with infra oversight, automation, and documentation to ensure scalable, reliable environments for semiconductor design workflows.

Qualifications

• Extensive experience in EDA/CAD engineering or semiconductor design infrastructure.
• Strong Linux/Unix knowledge and experience with engineering compute/storage environments.
• Proficient with Perforce Helix and IPLM data-management workflows.
• Experience with semiconductor EDA workflows and scripting in Python or shell.
• Ability to implement scalable, globally-distributed engineering environments.

Responsibilities

• Provide technical leadership for engineering compute infrastructure and CAD environments.
• Define requirements for compute, storage and supporting engineering infrastructure.
• Own Perforce/IPLM based data-management methodologies and tooling integrations.
• Develop standardized project/workspace environments and Cadence/tool configurations.
• Automate workflows with Python/shell scripts to reduce manual setup and improve reliability.
• Create and maintain technical documentation, training material and best practices.
• Contribute to the technical strategy and roadmap for compute and data-management infra.

Skills

EDA/CAD engineering

Linux/Unix

Compute infrastructure

Perforce Helix (P4)

IPLM

Python/shell scripting

Troubleshooting

Documentation

Tools

Perforce Helix (P4)

IPLM

Cadence tooling

Job description

Renesas Electronics seeks a Principal EDA/CAD Engineer to lead global compute and design-data-management environments. You will guide Linux-based engineering estates, define infrastructure requirements, and own Perforce/IPLM data-management methods across distributed teams.

The role combines hands-on CAD engineering with infra oversight, automation, and documentation to ensure scalable, reliable environments for semiconductor design workflows.