Principal Design Automation Engineer

Anysilicon; San Jose (CA); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Micron Technology is seeking a Staff/Principal Design Engineer to lead NAND circuit development, focusing on design automation and enablement. You will drive core Xpath/Ypath/Array design, integrate schematics into full chip designs, and validate performance through simulations.

The role requires a strong background in analog/mixed-signal design and 8+ years in NAND design, with expertise in Cadence, HSPICE, Verilog, and UNIX environments. Collaboration across teams is essential.

Qualifications

• MS in Electrical Engineering required.
• PhD preferred.
• 8+ years NAND design experience.
• Strong fundamentals in semiconductor physics.
• Experience in circuit verification, optimization, and layout planning.
• Proficiency with design tools (Cadence, HSPICE, Verilog).

Responsibilities

• Lead NAND circuit development through design automation and enablement.
• Implement core Xpath, Ypath, and Array design during project execution.
• Validate design performance via block and chip-level simulations.
• Design and validate analog and mixed-signal circuits (charge pumps, op amps, DACs, ADCs).
• Serve as technical authority solving complex modeling and simulation issues.
• Develop AI/LLM-assisted flows for circuit design and automated checks.
• Collaborate with multi-functional teams to ensure manufacturability and testability.
• Reduce cycle time by integrating automation with project execution.

Skills

Circuit design verification flows

Analog/mixed-signal circuit design

Python for engineering automation

Verilog

HSPICE

UNIX experience

Education

MS in Electrical Engineering

PhD preferred

Tools

Cadence design tools

HSPICE

Verilog

UNIX environment

Job description

Micron Technology is seeking a Staff/Principal Design Engineer to lead NAND circuit development within the NVE Design Engineering organization. This role focuses on design automation and circuit design enablement, aiming to enhance the efficiency and effectiveness of NAND memory solutions.

Responsibilities:

• Drive NAND circuit development through design automation and agentic circuit-design enablement.
• Implement core Xpath, Ypath, and Array design during project execution, integrating core schematics into full chip schematics.
• Validate design performance and functionalities by running block and chip level simulations using industry-standard simulators.
• Design and validate analog and mixed-signal circuits including charge pumps, op amps, DACs, ADCs, and more.
• Serve as a technical authority, solving complex problems at the intersection of circuit behavior, modeling, and simulation methodology.
• Develop AI/LLM-assisted flows for circuit design, including environment setup, guided simulation, and automated checks.
• Integrate automation with project execution, collaborating with circuit designers and other teams to reduce cycle time.
• Collaborate with multi-functional teams to ensure manufacturability, testability, and customer satisfaction.

Qualifications:

• MS in Electrical Engineering required; PhD preferred.
• 8+ years of relevant NAND design experience with knowledge of NAND Flash memory algorithms.
• Proficiency in analog/mixed-signal circuit design and layout.
• Strong fundamentals in semiconductor physics and reliability issues.
• Experience in circuit verification, optimization, and layout planning.

Skills:

• Proficient in circuit design verification flows and simulations.
• Strong understanding of analog and digital simulators such as HSPICE and Verilog.
• Proficient in Python for engineering automation and EDA tool collaboration.
• Familiarity with Cadence design tools and UNIX environment.