Principal Analog Design Engineer for DRAM IP

Micron Technology, Inc.; Boise (ID); Presencial; USD 180.000 - 240.000; Jornada completa

Descripción de la vacante

Micron Technology in Boise, Idaho, is seeking a Principal/MTS in Analog Design to help shape the next generation of DRAM IPs. You will lead analog block development, verify designs, and collaborate with global teams to translate circuit ideas into silicon.

The role requires a strong background in analog circuit design, SPICE/Verilog proficiency, and the ability to mentor junior engineers while ensuring robust layouts and cross-functional coordination.

Formación

• Bachelor’s degree in Electrical Engineering with 12+ years of semiconductor design experience.
• Strong analog circuit fundamentals and experience designing regulators, charge pumps, oscillators, current references, bandgaps, or comparators.
• Proficiency with SPICE and Verilog modeling and simulation.
• Ability to supervise physical layout work of analog circuits.
• Experience collaborating with technical and non-technical teams.

Responsabilidades

• Design, optimize, and verify analog and mixed-signal circuits for DRAM projects.
• Work with the internal data science team and EDA vendors to leverage and improve AI-assisted design flow and circuits optimization.
• Propose, evaluate and implement new or improved circuit topology to improve circuit PPAC.
• Improve design verification scope and coverage to increase circuit robustness for mass production yield.
• Partner with global design groups and provide layout guidance through post-layout simulation.
• Compare silicon performance with simulation results and support correlation activities.
• Mentor junior circuit designers and operate with minimal supervision.

Conocimientos

Analog design

SPICE

Verilog

Layout supervision

Circuit debugging

Mentoring

Cross-functional

Educación

Bachelor's degree in Electrical Engineering

MSEE

Descripción del empleo

Micron Technology in Boise, Idaho, is seeking a Principal/MTS in Analog Design to help shape the next generation of DRAM IPs. You will lead analog block development, verify designs, and collaborate with global teams to translate circuit ideas into silicon.

The role requires a strong background in analog circuit design, SPICE/Verilog proficiency, and the ability to mentor junior engineers while ensuring robust layouts and cross-functional coordination.