Principal Analog Design Engineer DRAM IP Mentorship

Micron Technology, Inc; Boise (ID); On-site; USD 150,000 - 230,000; Full time

Benefits offered by this job

Medical benefits

Dental benefits

Vision benefits

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. is seeking a Principal/MTS in Analog Design to lead the design, optimization and verification of block-level analog and mixed-signal circuits for DRAM projects in Boise.

You will work with data science teams and EDA vendors to leverage AI-assisted design flow and improve circuit performance and yield. The role requires thorough analog circuit fundamentals, SPICE/Verilog proficiency, and the ability to mentor junior engineers while coordinating with global teams and layout

Qualifications

• Bachelor’s degree in Electrical Engineering (EE) with 12+ years semiconductor design experience.
• Strong analog circuit fundamentals including regulators, charge pumps, oscillators, current references, bandgaps, or comparators.
• Proficiency with SPICE and Verilog modeling and simulation.
• Ability to supervise physical layout work of analog circuits.

Responsibilities

• Design, optimize, and verify block-level analog and mixed-signal circuits for DRAM projects.
• Collaborate with data science teams and EDA vendors to leverage Agentic-AI for design flow and circuit optimization.
• Propose and evaluate new circuit topologies to improve PPAC and robustness.
• Improve design verification scope and coverage; mentor junior circuit designers.

Skills

Analog design

Regulators

Charge pumps

Oscillators

Current references

Bandgaps

Comparators

SPICE modeling

Verilog modeling

Layout supervision

Cross-functional collaboration

Mentoring

Education

Bachelor's degree in Electrical Engineering

MSEE (preferred)

BSEE + 15 years mixed-signal or analog IC design

Tools

SPICE

Verilog

Job description

Micron Technology, Inc. is seeking a Principal/MTS in Analog Design to lead the design, optimization and verification of block-level analog and mixed-signal circuits for DRAM projects in Boise.

You will work with data science teams and EDA vendors to leverage AI-assisted design flow and improve circuit performance and yield. The role requires thorough analog circuit fundamentals, SPICE/Verilog proficiency, and the ability to mentor junior engineers while coordinating with global teams and layout