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Apple Inc. in Sunnyvale seeks an ASIC Design Engineer in the Pixel IP design team to build high performance, low power pixel processing engines and to capture/display digital images and video.
You will write RTL (Verilog/SystemVerilog), collaborate across architecture, design and verification, and optimize for timing, power and area, while integrating with front-end implementation and verification teams.
This role offers a comprehensive compensation package and relocation assistance.
Apple Inc. in Sunnyvale seeks an ASIC Design Engineer in the Pixel IP design team to build high performance, low power pixel processing engines and to capture/display digital images and video.
You will write RTL (Verilog/SystemVerilog), collaborate across architecture, design and verification, and optimize for timing, power and area, while integrating with front-end implementation and verification teams.
This role offers a comprehensive compensation package and relocation assistance.