ASIC Design Engineer — IP Integration & Implementation

Apple Inc.

Sunnyvale (CA)

Hybrid

USD 185,000 - 325,000

Full time

6 hours ago
Be an early applicant

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Apple Inc. is seeking an ASIC Design Engineer to join the Pixel IP design team.

You will develop high-performance, low-power pixel processing engines and integrate complex subsystems across architecture, design, and verification groups. You will author micro-architectural specs, craft RTL with assertions, collaborate with physical design for timing closure, and support verification to ensure correct functionality and performance.

Qualifications

  • Bachelor's degree and 10+ years of relevant industry experience.
  • Experience with ASIC/FPGA design methodology and floorplanning with timing closure.
  • Experience with multiple clock and reset domains.
  • Familiarity with AMBA protocols (AXI, AHB, APB).
  • Experience in low-power design and UPF power intent.
  • Proficiency in scripting (Python, Perl, TCL).
  • Datapath/pixel-centric design experience a plus.
  • Strong collaboration and communication skills.

Responsibilities

  • Write detailed micro-architectural and integration specifications.
  • Perform digital hardware design by writing RTL with embedded assertions and cover points.
  • Collaborate with physical design to optimize timing, area and power in silicon.
  • Follow industry best practices for power, clock and reset domains.
  • Work with verification and formal verification teams to debug and verify functionality.
  • Manage deliverables and support cross-functional engineering efforts.

Skills

IP/SoC design
Clock & reset domains
Scripting (Python, Perl, TCL)
Collaboration

Education

Bachelor's degree

Tools

AMBA (AXI/AHB/APB)
UPF power intent
Python/Perl/TCL scripting

Job description

Do you love creating elegant solutions to highly complex challenges? As part of our Hardware Technologies group, you’ll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, we will enable our customers to do all the things they love with their devices!In this highly visible role, you will be at the center of the Pixel IP design effort to capture and display beautiful images and video. You will collaborate with all disciplines, making a critical impact getting functional products to millions of customers quickly.

Description

As an ASIC Design Engineer in the Pixel IP design team, you be responsible for complex subsystem integration and implementation. You will work closely with architecture, design, and verification teams to build high performance and low power pixel processing engines. You will have responsibilities spanning all aspects of multimedia IP design.In this front-end design role, your tasks will include:

  • Writing detailed micro-architectural and integration specifications.
  • Perform digital hardware design by writing high-quality RTL, with embedded assertions and cover points.
  • Working with physical design teams to optimize timing, area, and power for our designs in silicon.
  • Ensuring that our designs follow industry best practices for handling power, clock, and reset domains.
  • Working closely with design verification and formal verification teams to debug and verify functionality and performance.
  • Working independently and manage deliverables to align with the project goals and support cross-functional engineering efforts.
Minimum Qualifications
  • Bachelor's degree and 10+ years of relevant industry experience
Preferred Qualifications
  • Deep experience in IP/SoC design, integration at the chip or subsystem level, and implementation.
  • Industry exposure to and knowledge of ASIC/FPGA design methodology, especially logic synthesis, static timing analysis, logic equivalence checking, and working with physical design teams for floorplanning and timing closure.
  • Experience with system design methodologies that contain multiple clock and reset domains.
  • Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB).
  • Experience in low-power design issues, tools, and methodologies including UPF power intent specification highly desired.
  • Industry exposure to and knowledge of ASIC design methodology including familiarity with relevant scripting languages (Python, Perl, TCL).
  • Experience in datapath and pixel-centric designs a plus.
  • Strong collaboration skills, with excellent written and verbal communication.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 and $324,800, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong. Learn about accessibility in Apple’s workplace Learn about reasonable accommodations for job applicants

Apple accepts applications to this posting on an ongoing basis.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

ASIC Design Engineer - IP Integration & Implementation
ASIC Design Engineer - IP Integration & Implementation

Apple Inc. • Sunnyvale (CA)

On-site
USD 185,000 - 325,000
Comprehensive medical and dental cover
Retirement benefits
Discounted products and free services
+3
ASIC Design Engineer — IP Integration & Implementation
ASIC Design Engineer — IP Integration & Implementation

Socket.dev • Sunnyvale (CA)

On-site
USD 180,000 - 320,000
ASIC Design Manager
ASIC Design Manager

Apple Inc. • Cupertino (CA), Northern (KY)

On-site
USD 206,000 - 356,000
Stock plans
Retirement benefits
Education reimbursement
+1
ASIC Design Engineer - Pixel IP DMA
ASIC Design Engineer - Pixel IP DMA

Apple Inc. • Cupertino (CA)

On-site
USD 126,000 - 191,000
Comprehensive medical and dental coverage
Retirement benefits
Discounted products and services
+2
ASIC Design Engineer
ASIC Design Engineer

Apple Inc. • Cupertino (CA), Northern (KY)

Hybrid
USD 185,000 - 325,000
Stock options
Employee stock purchase plan
Medical and dental coverage
+2
ASIC Design and Integration Engineer
ASIC Design and Integration Engineer

Apple • Beaverton (OR)

On-site
USD 181,000 - 319,000
Comprehensive medical and dental coverage
Retirement benefits
Discounted products and services
+2
ASIC Design Engineer
ASIC Design Engineer

Apple Inc. • Beaverton (OR)

On-site
USD 150,000 - 210,000
Digital Architect
Digital Architect

Apple • Austin (TX)

On-site
USD 171,000 - 303,000
Comprehensive medical and dental coverage
Retirement benefits
Stock purchase plan
+2
ASIC Design and Integration Engineer - Silicon Security
ASIC Design and Integration Engineer - Silicon Security

Apple Inc. • Cupertino (CA)

On-site
USD 129,000 - 195,000
Medical and dental coverage
Retirement benefits
Employee stock programs
+1
Senior ASIC Design & Integration Engineer
Senior ASIC Design & Integration Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 180,000 - 260,000