Physical Design Lead: RTL-to-GDS & PnR Expert

Quest Global; San Jose (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Quest Global in San Jose is seeking a seasoned Physical Design Expert to lead a silicon implementation team, driving RTL-to-GDS flow, sign-off, and full-chip integration. You will collaborate with SOC architects, PD/STA engineers and IP teams to ensure first-pass silicon success.

Your role emphasizes backend convergence, PnR, timing, verification and IP integration, with responsibility for delivering tape-outs from RTL to GDS.

Qualifications

• 15+ years in physical design RTL to GDS, STA, timing and tapeout.
• Block-level implementation incl. Place & Route, floorplanning, timing closure.
• Experience with PD verification signoff techniques and EDA tools.

Responsibilities

• Lead physical design team for implementation and convergence of complex tiles.
• Deliver GDS from RTL including signoff and physical verification.
• Collaborate with cross-functional teams to improve PPA.
• Understand and drive timing convergence, full-chip integration and IP integration.
• Track milestones and project convergence; communicate status clearly.
• Drive methodology development and best practices in PD.
• Provide technical direction and support to the engineering team.

Skills

Physical design

RTL to GDS

PPA optimization

Scripting (Perl/TCL/Shell/Python)

Verilog/VHDL RTL design

Communication skills

Education

B.Tech/M.Tech/MS/Ph.D. in Computer/Electronics/Electrical Engineering

Tools

Cadence Innovus

Job description

Quest Global in San Jose is seeking a seasoned Physical Design Expert to lead a silicon implementation team, driving RTL-to-GDS flow, sign-off, and full-chip integration. You will collaborate with SOC architects, PD/STA engineers and IP teams to ensure first-pass silicon success.

Your role emphasizes backend convergence, PnR, timing, verification and IP integration, with responsibility for delivering tape-outs from RTL to GDS.