Physical Design Intern — High-Speed ASIC (7nm/16nm)

Ampere; Santa Clara (CA); On-site; USD 76,000 - 83,000; Full time

Benefits offered by this job

Hourly pay

Mentorship and on-the-job training

Ergo friendly desk setup

Game rooms and social spaces

Micro-kitchens and snacks

Job summary

Ampere invites interns to contribute to high-performance CPU design with a focus on energy-efficient AI compute. The internship runs Fall 2026 (Sept–Dec) and emphasizes hands-on participation in physical design blocks, timing, and verification within a collaborative team.

As part of Ampere's internship program, you’ll build networks, gain technical expertise, and receive mentorship while contributing to real design efforts across the company.

Qualifications

• Pursuing a master’s degree in Electrical Engineering with a focus on VLSI/high-speed design.
• Experience in floorplanning, place & route, timing constraints generation.
• Knowledge of CMOS 7nm process implications on physical design.
• Proficient in Tcl, Python, and shell scripting.

Responsibilities

• Design and implement solutions using timing, floor-planning, high-speed techniques, and formal verification.
• Run synthesis, placement, CTS, routing to make blocks ready for sign-off.
• Automate workflows with EDA tool scripting to improve throughput and quality.
• Implement lower-geometry designs using 7nm rules and device characteristics.
• Utilize design libraries and macro-compiler tools to support processor design.

Skills

Floor planning

Place & route

Timing constraints

Scripting Tcl

Python

Shell scripting

Education

Master's in Electrical Engineering (VLSI/high-speed microprocessor design)

Tools

EDA tools

Job description

Ampere invites interns to contribute to high-performance CPU design with a focus on energy-efficient AI compute. The internship runs Fall 2026 (Sept–Dec) and emphasizes hands-on participation in physical design blocks, timing, and verification within a collaborative team.

As part of Ampere's internship program, you’ll build networks, gain technical expertise, and receive mentorship while contributing to real design efforts across the company.