Physical Design & Timing Intern — AI-Driven Flows

NVIDIA; Santa Clara (CA); On-site; USD 28,000 - 98,000; Full time

Benefits offered by this job

Intern benefits

Hourly pay

Job summary

NVIDIA invites applications for a Physical Design and Timing Engineer – Intern to join our Santa Clara team. You will drive physical design tasks, assist with timing closure for high-frequency designs, and support RTL to GDSII flows.

The role requires pursuing an MS or PhD in Electrical or Computer Engineering, with familiarity in AI/ML for design, STA and power analysis, and experience with EDA tools. We offer internship pay and benefits, with an application deadline approaching.

Qualifications

• Pursuing an MS or Ph.D. in Electrical or Computer Engineering.
• Familiarity with applying AI/ML techniques to physical design workflows to accelerate design, analysis, or automation tasks.
• Knowledge of or experience with Static Timing Analysis (STA), power analysis, and power reduction.
• Some experience in logic synthesis and equivalence checking.
• Experience with physical optimization, e.g., placement, routing, clock tree, etc.
• Some background in industry-standard EDA tools (e.g., Cadence, Synopsys, Siemens, etc.).
• Proficiency in programming and scripting languages such as Perl, Tcl, Make, Python, etc.

Responsibilities

• Drive physical design, power, and timing closure for high-frequency and low-power designs.
• Help drive frontend and backend implementation in select areas, from RTL to GDSII.
• Run physical design experiments and help develop flows and methodologies.

Skills

Python

Perl

Tcl

Make

AI/ML in EDA

Education

MS or PhD in Electrical or Computer Engineering

Tools

Cadence

Synopsys

Siemens

Job description

NVIDIA invites applications for a Physical Design and Timing Engineer – Intern to join our Santa Clara team. You will drive physical design tasks, assist with timing closure for high-frequency designs, and support RTL to GDSII flows.

The role requires pursuing an MS or PhD in Electrical or Computer Engineering, with familiarity in AI/ML for design, STA and power analysis, and experience with EDA tools. We offer internship pay and benefits, with an application deadline approaching.