Physical Design Engineer - PnR, PPA & Timing Closure

Globex Digital Corp.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Globex Digital Corp. seeks a Physical Design Engineer for Austin, TX to lead PnR/VLSI flow, floorplanning, CTS, routing, and timing convergence. You will optimize Power-Performance-Area (PPA) and ensure timing closure across multiple corners while addressing SETUP/HOLD violations and EMIR concerns.

You will collaborate with RTL, DFT, STA, and Signoff teams to drive tapeout readiness and design convergence within project schedules.

Qualifications

• Experience with physical design flows from netlist to GDSII.
• Proven ability to achieve timing closure across corners.
• Knowledge of EMIR analysis and IR drop.
• Experience with low-power design techniques.
• Strong debugging and cross-functional collaboration.

Responsibilities

• Drive block-level physical design from netlist to GDSII.
• Perform floorplanning, power planning, placement, CTS, routing, and signoff.
• Develop timing constraints (SDC) and STA methodologies.
• Collaborate with RTL, DFT, and Signoff teams.
• Debug physical design issues to meet tapeout schedules.

Skills

Physical Design

PnR flow

Floorplanning

Placement & Optimization

CTS

Routing

Timing Closure

STA

SDC

EMIR Analysis

PPA Optimization

EDA Tools

Education

Bachelor's or Master's in Electrical/Electronics Engineering

Tools

Cadence Innovus

RedHawk/Voltus

Job description

Globex Digital Corp. seeks a Physical Design Engineer for Austin, TX to lead PnR/VLSI flow, floorplanning, CTS, routing, and timing convergence. You will optimize Power-Performance-Area (PPA) and ensure timing closure across multiple corners while addressing SETUP/HOLD violations and EMIR concerns.

You will collaborate with RTL, DFT, STA, and Signoff teams to drive tapeout readiness and design convergence within project schedules.