Lead Physical Design Engineer - Timing & PPA

The Consensus; Austin (TX); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

Medical, dental, and vision

Lunch provided daily

Unlimited compute budget

Job summary

Etched, based in Austin, TX, is seeking exceptional Physical Design engineers to own block-level implementation and verification, drive timing closure and PPA, and supervise third-party PD work. The role collaborates with RTL designers to refine PD flows and improve CAD infrastructure.

You will be responsible for PD flows, dashboards, and block-level closure while partnering with teams across RTL and EDA vendors. Expect exchange with the San Jose team as needed.

Qualifications

• 5–10+ years of PD experience.
• RTL to GDSII sign-off knowledge.
• Back-end design and timing closure on 5nm and below.
• Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.).
• Familiar with UPF-based low power design, ATPG, formal verification, floorplanning, placement, CTS, routing, EM/antenna analysis.

Responsibilities

• Run PD flows to close blocks and support ASIC infrastructure.
• Develop dashboards to track PD project convergence.
• Collaborate with RTL designers to improve PPA.
• Oversee outsourcing of PD to third-party services.
• Optimize tool flows and coordinate with EDA vendors.
• Own block-level closure accountability.

Skills

PD experience

Python scripting

ML awareness

Tools

Cadence Innovus

Cadence Genus

Synopsys ICC2

Fusion Compiler

PrimeTime

Tempus

Voltus

Job description

Etched, based in Austin, TX, is seeking exceptional Physical Design engineers to own block-level implementation and verification, drive timing closure and PPA, and supervise third-party PD work. The role collaborates with RTL designers to refine PD flows and improve CAD infrastructure.

You will be responsible for PD flows, dashboards, and block-level closure while partnering with teams across RTL and EDA vendors. Expect exchange with the San Jose team as needed.