Physical Design Engineer - High-Speed SerDes & RTL-to-GDS

Infobahn Softworld Inc

Santa Clara (CA)

On-site

USD 120,000 - 190,000

Full time

26 hours ago
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Job summary

Infobahn Softworld Inc in Santa Clara, CA, is seeking a Physical Design Engineer to take RTL to GDS with synthesis, place-and-route, timing, and physical verification, driving high-speed Datapath and control logic blocks.

You will collaborate with geographically distributed teams, automate design flows for clock tree synthesis, power gating, buffer insertion, and sign-off for large IP, ensuring timing, power and area targets are met.

Qualifications

  • 2-5+ years in high-speed SerDes PHY or high-performance IP designs.
  • Proficiency in Python and/or Perl; other languages are a plus.
  • Experience with automated design flows for RTL, synthesis, and P&R.
  • RTL to GDS flow with timing-driven P&R for datapath and control logic.
  • Experience in floor planning, IP integration, and sign-off processes.
  • Familiarity with schematics, layout, and circuit simulation tools.

Responsibilities

  • Lead RTL-to-GDS flow including synthesis, P&R, timing, and physical verification.
  • Perform floor planning and IP integration; ensure design checks for quality.
  • Develop automated design flows for clock tree synthesis, gating, and optimization.
  • Collaborate with distributed teams to meet cycle-time targets.
  • Support final sign-off for large IP delivery.

Skills

RTL to GDS
Place & Route
Synthesis
Timing Analysis
Python
Perl
Verilog
Clock Tree Synthesis
Floor Planning

Education

Master’s degree in EE/CS

Tools

Schematics
Layout
Circuit/Logic Simulation

Job description

Infobahn Softworld Inc in Santa Clara, CA, is seeking a Physical Design Engineer to take RTL to GDS with synthesis, place-and-route, timing, and physical verification, driving high-speed Datapath and control logic blocks.

You will collaborate with geographically distributed teams, automate design flows for clock tree synthesis, power gating, buffer insertion, and sign-off for large IP, ensuring timing, power and area targets are met.

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