New Grad Physical Design Engineer: RTL to GDS, Cadence

SambaNova, Inc.; San Jose (CA); On-site; USD 120,000 - 150,000; Full time

Benefits offered by this job

Health insurance

Dental insurance

Vision insurance

HSA employer contribution

Gympass+ membership

Headspace

Job summary

SambaNova Systems in San Jose, CA is seeking a new grad Physical Design Engineer to optimize the RTL-to-GDS flow on advanced process nodes. You will write TCL and Python scripts to automate flow steps and collaborate with CAD tooling teams.

The role emphasizes timing, congestion debugging, and working with Cadence Genus, Innovus, and Cerebrus, gaining hands-on tape-out and design-rule experience for a fast-growing AI hardware platform.

Qualifications

• BS in Electrical Engineering, Computer Engineering, or Computer Science is required.
• Coursework or project experience in VLSI or digital IC design is required.
• Understanding of the RTL to GDS flow, including synthesis and place and route is required.
• Scripting experience in TCL, Perl, or Python is required.

Responsibilities

• Run synthesis and place and route using Cadence Genus, Innovus, and Cerebrus.
• Write scripts in TCL and Python to automate and improve the physical design flow.
• Help physical designers debug timing, congestion, and design rule issues.
• Work with tool vendors to report bugs and test flow improvements.
• Maintain flow documentation and regression testing.

Skills

RTL to GDS flow

Scripting (TCL/Perl/Python)

Education

B.S. in Electrical Engineering, Computer Engineering, or Computer Science

M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Cadence Genus

Cadence Innovus

Cerebrus

Cadence/Synopsys flow tools

Job description

SambaNova Systems in San Jose, CA is seeking a new grad Physical Design Engineer to optimize the RTL-to-GDS flow on advanced process nodes. You will write TCL and Python scripts to automate flow steps and collaborate with CAD tooling teams.

The role emphasizes timing, congestion debugging, and working with Cadence Genus, Innovus, and Cerebrus, gaining hands-on tape-out and design-rule experience for a fast-growing AI hardware platform.