Memory Verification Engineer - DDR5/LPDDR5 & DFI Expert

Advanced Micro Devices, Inc.; Santa Clara (CA); On-site; USD 140,000 - 190,000; Full time

Job summary

AMD is seeking an experienced Verification Engineer to lead verification for server memory products, evaluating DDR5, LPDDR5, and DFI interfaces. The role requires strong SystemVerilog, UVM, C/C++, and scripting skills (Python/Perl) and collaboration across HW, FW, BIOS, and SW teams.

You will mentor peers, advance verification methodology, and support post-Si validation for performance and power issues in a Santa Clara, CA environment.

Qualifications

• Advanced knowledge of SystemVerilog/UVM and memory verification.
• Experience with DDR5/LPDDR5/DFI verification and server memory systems.
• Collaborative cross-functional work with HW/SW/ FW teams.

Responsibilities

• Work with verification engineers to develop/execute verification plans for memory systems.
• Ensure PHY interactions with HW/SW BIOS and FW are aligned to support features.
• Engage in cross-functional design discussions and debug readiness.
• Contribute to verification methodology and knowledge sharing.
• Support Post-Si for performance, power, and functional issues.

Skills

SystemVerilog

UVM

C/C++

Python

Perl

Education

Bachelor’s degree or Master’s degree in related discipline

Tools

VIPs

BFMs

Job description

AMD is seeking an experienced Verification Engineer to lead verification for server memory products, evaluating DDR5, LPDDR5, and DFI interfaces. The role requires strong SystemVerilog, UVM, C/C++, and scripting skills (Python/Perl) and collaboration across HW, FW, BIOS, and SW teams.

You will mentor peers, advance verification methodology, and support post-Si validation for performance and power issues in a Santa Clara, CA environment.