Memory Validation Engineer

TPI Global Solutions

Austin (TX)

On-site

USD 70,000 - 90,000

Full time

14 days+
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Job summary

A technology solutions provider in Austin, Texas is seeking a Jr Memory Systems Engineer to join their team. In this role, you will be tasked with executing tests for DDR5 and LPDDR5x memory subsystems, developing technical test plans, and debugging electrical data. Candidates should have a BS in Electrical or Computer Engineering and at least one year of related experience. Strong communication skills and knowledge of PC architectures are essential. This position offers the chance to engage in hands-on engineering in a collaborative environment.

Qualifications

  • BS-EE / BS-CE / Masters plus at least 1 year of directly related experience.
  • Demonstrated technical expertise in platform level memory interface testing.
  • Knowledge of PC architectures and system technologies.

Responsibilities

  • Execute electrical and functional tests for DDR5 and LPDDR5x memory sub-systems.
  • Develop test plans and tools for silicon validation.
  • Analyze test data to drive production decisions.

Skills

Technical test plan development
Communication with engineering disciplines
PC architecture knowledge

Education

BS in Electrical Engineering or Computer Engineering
Masters degree

Tools

Oscilloscopes
Logic analyzers

Job description

Overview
  • Proven ability to work closely with others in a hands-on environment
  • Knowledge of PC architectures and system technologies.
  • Good written and oral communication skills, with the ability to communicate with a variety of engineering disciplines and management.
  • Familiar with Microsoft Operating Systems, Linux Operating Systems and basic ability to navigate both
  • Experience with computer testing, debug, validation, performance benchmarking or building PCs
Role

Jr Memory Systems Engineer

Responsibilities
  • Execute electrical, functional, & system tests of DDR5 and LPDDR5x memory sub-system test plans as part of a post silicon platform engineering team using hardware and software validation tools, oscilloscopes, and logic analyzers.
  • Develop technical test plans and tools to support platform level silicon bring-up and the validation execution of DDR5 and LPDDR5x memory subsystem.
  • Analyze & debug electrical and functional test data to drive into production SOC and system solution decisions.
  • Supports lab functions including rework, inventory, & system test of platforms
Skills required
  • BS-EE / BS-CE / Masters plus at least 1 years directly related experience. An advanced degree will be considered a plus.
  • Demonstrated technical expertise in the development and execution of platform level memory interface electrical and functional test plans
  • Knowledge of PC architectures and system technologies.
  • Demonstrated experience with or knowledge using oscilloscopes, reading schematics and layout design files
  • Good written and oral communication skills, with the ability to communicate with a variety of engineering disciplines and management.
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