Memory Standards Architect: LPDDR & DRAM Buffers

Advanced Micro Devices, Inc.; Atlanta (GA); Ibrido; USD 180.000 - 240.000; Tempo pieno

Descrizione del lavoro

Advanced Micro Devices, Inc. seeks a Memory Standards Architect to own the LPDDR and DRAM-buffer strategy across AMD's product generations. The role leads technical positions for LPDDR devices and DDR6 clock drivers, representing AMD in JEDEC and the memory ecosystem.

You will align business units with DRAM vendors and buffer suppliers while guiding architecture across platforms. You will consolidate product, platform, design, validation, firmware, and system needs into unified AMD positions and

Competenze

• Strong LPDDR and DDR knowledge and architectural judgment.
• Experience aligning internal teams and external partners.

Mansioni

• Define AMD's multi-generation LPDDR and DRAM-buffer strategy and roadmaps.
• Represent AMD in JEDEC and related forums; drive consensus and standards work.
• Define architectural requirements for LPDDR devices, DDR6 drivers, LPDDR6 buffers, and related components.
• Coordinate DRAM and buffer architectures with controller/SoC/packaging teams; guide tradeoffs across implementations.
• Deliver implementation requirements for architecture, SPD, configuration, firmware, and power/thermal design.

Conoscenze

LPDDR

DRAM-buffer

JEDEC standards

Architectural strategy

Cross-functional leadership

System integration

DDR6

In-package buffers

Formazione

Bachelor's degree in Electrical Engineering/Computer Engineering/Computer Science

Descrizione del lavoro

Advanced Micro Devices, Inc. seeks a Memory Standards Architect to own the LPDDR and DRAM-buffer strategy across AMD's product generations. The role leads technical positions for LPDDR devices and DDR6 clock drivers, representing AMD in JEDEC and the memory ecosystem.

You will align business units with DRAM vendors and buffer suppliers while guiding architecture across platforms. You will consolidate product, platform, design, validation, firmware, and system needs into unified AMD positions and