Low-Power SoC Verification Engineer

Apple Inc.; Cupertino (CA); Hybrid; USD 150,000 - 225,000; Full time

Benefits offered by this job

Medical & Dental

Retirement benefits

Employee stock programs

Relocation assistance

Tuition reimbursement

Job summary

Apple Inc. is seeking a hardware verification engineer in Cupertino, CA to verify low power aspects of Apple SOCs. You will develop test plans, create directed and random tests, and write C-based test cases and SystemVerilog models to verify power state transitions.

Collaboration with design, architecture, and software teams is essential, with scripting in Perl/Python to automate regressions. The role offers a competitive base pay and comprehensive Apple benefits, including stock programs,

Qualifications

• Bachelor’s degree in CS/CE or related field plus 2 years of relevant experience.
• Experience with digital/logic design concepts for hardware verification.
• Proficient in ARM/X86 architecture driven verification stimulus.
• C-based stimulus development for chip-level verification.
• SystemVerilog for stimulus and behavioral models.
• C programming for test cases and stimulus.
• Perl or Python for automation and regression maintenance.
• Low-power design fundamentals and UPF power intent.

Responsibilities

• Develop test plans and coverage plans for low power verification of Apple SOCs.
• Create directed and random tests for power manager integration.
• Write tests in C for hardware verification and stimulus.
• Develop SystemVerilog models to simulate SOC with power manager.
• Write scripts (Perl/Python) to automate test execution and regression.
• File bug reports for simulation failures and track until fix.
• Coordinate with design, architecture, software teams to meet project goals.

Skills

Digital design concepts

Logic design

ARM/X86 architecture

C stimulus

SystemVerilog

C programming

Perl/Python scripting

Low power design

UPF power intent

Education

Bachelor’s Degree in CS/CE

Tools

CAD software

AXI/AMBA protocols

Job description

Apple Inc. is seeking a hardware verification engineer in Cupertino, CA to verify low power aspects of Apple SOCs. You will develop test plans, create directed and random tests, and write C-based test cases and SystemVerilog models to verify power state transitions.

Collaboration with design, architecture, and software teams is essential, with scripting in Perl/Python to automate regressions. The role offers a competitive base pay and comprehensive Apple benefits, including stock programs,