Low Power Wireless SoC Design Engineer

Apple, Inc.; Sunnyvale (CA); On-site; USD 123,000 - 214,000; Full time

Benefits offered by this job

Comprehensive medical and dental

Retirement benefits

Discounted products and free services

Education expenses reimbursement

Discretionary bonuses or commissions

Relocation

Job summary

Apple, Inc. in Sunnyvale, CA, is seeking a power management/low power design engineer for wireless SoCs. You will design and verify power management logic affecting billions of devices, with emphasis on energy efficiency and integration with SoC components.

You will collaborate with cross-functional teams to meet product requirements, perform post-silicon validation, and support debugging. We value strong Verilog skills, scripting ability, and deep knowledge of low-power techniques.

Qualifications

• Bachelor's degree required.
• Proven track record in power/clock/reset management logic design.
• Proficiency in Verilog language.
• Power management logic verification and debug experience.
• Understand ASIC low power design techniques.
• Knowledge of CDC, RDC, STA and UPF.
• Proficiency in scripting languages (Shell, Perl or Python).
• Knowledge of common SOC components (CPU, fabric, peripherals).
• Strong problem solving and analytical skills.

Responsibilities

• Define SoC power management features to meet product requirements.
• Implement power management logic.
• Work with XF teams to verify power management logic.
• Support Power team on power analysis and post-silicon correlation efforts.
• Post silicon bring up and debug support.

Skills

Power management

Verilog

Scripting

CDC/RDC/STA/UPF

SOC components knowledge

Problem solving

Power verification

Education

Bachelor's degree

Job description

Apple, Inc. in Sunnyvale, CA, is seeking a power management/low power design engineer for wireless SoCs. You will design and verify power management logic affecting billions of devices, with emphasis on energy efficiency and integration with SoC components.

You will collaborate with cross-functional teams to meet product requirements, perform post-silicon validation, and support debugging. We value strong Verilog skills, scripting ability, and deep knowledge of low-power techniques.