Low-Power ASIC Design Engineer

Apple, Inc.

Cupertino (CA)

On-site

USD 154,000 - 225,000

Full time

21 hours ago
Be an early applicant

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Competitive compensation
Employee stock program
Comprehensive medical and dental

Job summary

Apple Inc. in Cupertino, CA, is seeking researchers to advance low power semiconductor designs. The role focuses on developing and verifying power-efficient ASIC techniques, prototyping with RTL, and validating circuits for reliability and testability.

Responsibilities include creating automation tools to scale design modifications and evaluating power savings across system levels. A Master’s degree and experience in low power design are required, with relocation possible.

Qualifications

  • Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.
  • Experience or education must include low power ASIC design to explore and prototype novel low power methods.
  • Prototyping and simulating energy efficient CMOS or mixed-signal circuits to implement design prototype.

Responsibilities

  • Research new low power methods and power intent verification.
  • Review current design flows and methodologies to identify scope for power reduction.
  • Prototype test designs in RTL and circuits to prove new low power schemes.
  • Synthesize and validate low power designs for functionality, reliability and testability.
  • Develop software to automate design modifications for wide-scale adoption of novel methods.
  • Estimate power savings and assess impact on system power, performance and area.
  • Design and simulate novel energy efficient circuits.

Skills

Low Power ASIC design
Power intent verification
Automation scripting

Education

Master's degree in Electrical and Computer Engineering

Tools

Tcl scripting
Python scripting
Perl scripting

Job description

Apple Inc. in Cupertino, CA, is seeking researchers to advance low power semiconductor designs. The role focuses on developing and verifying power-efficient ASIC techniques, prototyping with RTL, and validating circuits for reliability and testability.

Responsibilities include creating automation tools to scale design modifications and evaluating power savings across system levels. A Master’s degree and experience in low power design are required, with relocation possible.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Custom Circuits Engineer – Low-Power AI ASICs & SoC
Custom Circuits Engineer – Low-Power AI ASICs & SoC

Apple Inc. • Santa Clara (CA)

Hybrid
USD 150,000 - 278,000
Stock programs
Relocation assistance
Education reimbursement
+3
Low-Power Wireless ASIC Power Engineer
Low-Power Wireless ASIC Power Engineer

Apple, Inc. • San Diego (CA)

On-site
USD 175,000 - 309,000
Stock program
Medical and dental coverage
Retirement benefits
+3
Low-Power ASIC Power Engineer for Wireless SoC
Low-Power ASIC Power Engineer for Wireless SoC

Apple • San Diego (CA)

On-site
USD 120,000 - 190,000
Senior Wireless SoC Design Engineer – Low Power
Senior Wireless SoC Design Engineer – Low Power

Apple, Inc. • San Diego (CA)

On-site
USD 175,000 - 309,000
Senior ASIC Power Architect – Wireless SOC (Low Power)
Senior ASIC Power Architect – Wireless SOC (Low Power)

Apple, Inc. • Sunnyvale (CA)

On-site
USD 185,000 - 325,000
Ultra-Low Power Digital Circuit Engineer
Ultra-Low Power Digital Circuit Engineer

Apple Inc. • Cupertino (CA)

Hybrid
USD 149,000 - 218,000
Employee stock purchase plan
Discretionary RSUs
Medical and dental coverage
+1
Low-Power Physical Design Engineer (7nm+)
Low-Power Physical Design Engineer (7nm+)

Apple Inc. • Cupertino (CA)

Hybrid
USD 174,000 - 225,000
Senior Wireless SoC Engineer - Low Power
Senior Wireless SoC Engineer - Low Power

Apple, Inc. • Waltham (MA)

On-site
USD 175,000 - 309,000
Stock programs
Relocation assistance
Educational reimbursement
+1
Lead Circuit Design Engineer – Custom ASICs & Low Power
Lead Circuit Design Engineer – Custom ASICs & Low Power

Apple Inc. • San Diego (CA)

Hybrid
USD 142,000 - 263,000
Apple Employee Stock Plan
Bonuses/commissions eligibility
Relocation assistance
+2
Low-Power Wireless SoC Engineer
Low-Power Wireless SoC Engineer

Apple Inc. • Sunnyvale (CA)

On-site
USD 129,000 - 225,000
Health coverage
Retirement benefits
Discounts & services
+2