Senior Wireless SoC Engineer - Low Power

Apple, Inc.

Waltham (MA)

On-site

USD 175,000 - 309,000

Full time

34 hours ago
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Benefits offered by this job

Stock programs
Relocation assistance
Educational reimbursement
Medical and dental coverage

Job summary

Apple in Massachusetts is seeking a senior ASIC designer to develop CPU-based subsystems for high performance, low power wireless SoCs. You will collaborate with SoC architects, IP developers, and cross-functional teams to meet power, performance, and area goals and to help launch leading-edge Apple devices.

You will write micro-architecture specs, code in SystemVerilog, integrate IP blocks, verify designs, and optimize area, timing, and power while maintaining high quality across the design

Qualifications

  • BS with 10+ years relevant experience.
  • Familiarity with the ASIC design flow.
  • Knowledge of digital design, SoC architecture, and HDL languages like Verilog.

Responsibilities

  • Write micro-architecture and design specifications.
  • Code design in SystemVerilog following established guidelines, owning RTL development.
  • Integrate IP blocks and optimize memories/hard macros needed for the block.
  • Support verification efforts at multiple levels.
  • Check designs with industry standard tools such as LINT, CDC, RDC.
  • Analyze and optimize area, timing, and power.
  • Collaborate with multi-disciplinary groups to ensure on-time, high-quality delivery.

Skills

Digital design
SoC architecture
Verilog/SystemVerilog
Low-power design

Tools

AXI/AHB bus fabric
LINT
CDC
RDC
EDA tools

Job description

Apple in Massachusetts is seeking a senior ASIC designer to develop CPU-based subsystems for high performance, low power wireless SoCs. You will collaborate with SoC architects, IP developers, and cross-functional teams to meet power, performance, and area goals and to help launch leading-edge Apple devices.

You will write micro-architecture specs, code in SystemVerilog, integrate IP blocks, verify designs, and optimize area, timing, and power while maintaining high quality across the design

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