Lead RFIC & Mixed-Signal ASIC Designer for Space Communications

Blue Origin; San Diego (CA); On-site; USD 213,000 - 299,000; Full time

Benefits offered by this job

Medical, dental, vision

401(k) with match

Paid time off

Job summary

Blue Origin is seeking an experienced RFIC engineer to design and develop RFICs and mixed-signal ASICs for the TeraWave program. The role involves implementing designs with Cadence Virtuoso/Spectre RF, developing analog verification models, and creating robust test plans for pre- and post-silicon validation.

You will collaborate with systems, firmware, architecture, and product engineering teams, and contribute to lab integration and troubleshooting while adopting AI-based design methods across

Qualifications

• 10+ years of industry experience in RFIC design or PhD equivalent research.
• Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline.
• Experience with RF and/or Mixed Signal Block design.
• Experience with Linux development environment.
• Direct Tape-out experience in RF or deep sub-micron analog/mixed-signal chip.

Responsibilities

• Design and develop RFICs and mixed-signal ASICs.
• Implement designs using Cadence Virtuoso, Spectre RF and similar tools.
• Develop analog model for verification methodologies for ASIC verification.
• Create and execute test plans for pre and post-silicon processes.
• Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering.

Skills

RFIC design

Mixed-signal design

Linux development

Tape-out experience

Education

Bachelors in Electrical Engineering

Tools

Cadence Virtuoso

Spectre RF

Job description

Blue Origin is seeking an experienced RFIC engineer to design and develop RFICs and mixed-signal ASICs for the TeraWave program. The role involves implementing designs with Cadence Virtuoso/Spectre RF, developing analog verification models, and creating robust test plans for pre- and post-silicon validation.

You will collaborate with systems, firmware, architecture, and product engineering teams, and contribute to lab integration and troubleshooting while adopting AI-based design methods across