Lead Physical Design Engineer – Full-Chip Implementation

Microchip Technology Inc.; Chandler (AZ); On-site; USD 150,000 - 230,000; Full time

Job summary

Microchip Technology Inc. is seeking a Principal Engineer for the CAD Physical Design (PD) team in Chandler, AZ.

You will lead full-chip APR and physical implementation, collaborating with a worldwide team on hierarchical, low-power designs with multi-mode and multi-corner constraints. You will apply advanced place-and-route methodologies, manage timing closure and sign-off, and mentor engineers while using TCL/Perl scripting to automate flows.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering with 10+ years of relevant experience.
• Hands-on experience in physical design flows such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance and physical verification.
• Advanced knowledge of place and route methodologies.
• Recent experience leading full-chip Physical Design activities.
• Advanced knowledge of VLSI logic principles, clock structures, and timing closure.
• Advanced knowledge of sign-off tools for STA, Formal Equivalence, Parasitic Extraction, Power Integrity, and Physical Verification.
• Knowledge of UPF and Low Power design practices across the full flow.
• Daily use of ICC/ICC2 or Innovus is preferred.
• Experience with 40nm or 28nm technologies; 16nm or smaller preferred.
• Proficiency in Tcl and Perl scripting.
• Excellent written and verbal communication skills.
• Excellent problem-solving and debugging skills.
• Self-motivated team player able to collaborate across geographically diverse teams.

Responsibilities

• Lead full-chip APR and physical implementation from netlist to GDSII.
• Collaborate across global teams on hierarchical, low-power, multi-mode designs.
• Apply advanced place-and-route methodologies to meet timing and power goals.
• Perform sign-off and timing-closure across multiple corners and constraints.
• Mentor senior and junior engineers and drive cross-team collaboration.

Skills

Floor planning

Placement optimization

Clock tree synthesis

Routing

Tcl scripting

Perl scripting

Communication skills

Education

Bachelor's or Master's Degree in Electrical/Electronics Engineering

Tools

ICC/ICC2

Innovus

Calibre

Job description

Microchip Technology Inc. is seeking a Principal Engineer for the CAD Physical Design (PD) team in Chandler, AZ.

You will lead full-chip APR and physical implementation, collaborating with a worldwide team on hierarchical, low-power designs with multi-mode and multi-corner constraints. You will apply advanced place-and-route methodologies, manage timing closure and sign-off, and mentor engineers while using TCL/Perl scripting to automate flows.