Principal Engineer - Physical Design

Microchip Technology Inc.

Chandler (AZ)

On-site

USD 150,000 - 230,000

Full time

2 days ago
Be an early applicant
Application generator

Get a reply from this employer — a resume and cover letter tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Microchip Technology Inc. is seeking a Principal Engineer for the CAD Physical Design (PD) team in Chandler, AZ.

You will lead full-chip APR and physical implementation, collaborating with a worldwide team on hierarchical, low-power designs with multi-mode and multi-corner constraints. You will apply advanced place-and-route methodologies, manage timing closure and sign-off, and mentor engineers while using TCL/Perl scripting to automate flows.

Qualifications

  • Bachelor’s or Master’s degree in Electrical/Electronics Engineering with 10+ years of relevant experience.
  • Hands-on experience in physical design flows such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance and physical verification.
  • Advanced knowledge of place and route methodologies.
  • Recent experience leading full-chip Physical Design activities.
  • Advanced knowledge of VLSI logic principles, clock structures, and timing closure.
  • Advanced knowledge of sign-off tools for STA, Formal Equivalence, Parasitic Extraction, Power Integrity, and Physical Verification.
  • Knowledge of UPF and Low Power design practices across the full flow.
  • Daily use of ICC/ICC2 or Innovus is preferred.
  • Experience with 40nm or 28nm technologies; 16nm or smaller preferred.
  • Proficiency in Tcl and Perl scripting.
  • Excellent written and verbal communication skills.
  • Excellent problem-solving and debugging skills.
  • Self-motivated team player able to collaborate across geographically diverse teams.

Responsibilities

  • Lead full-chip APR and physical implementation from netlist to GDSII.
  • Collaborate across global teams on hierarchical, low-power, multi-mode designs.
  • Apply advanced place-and-route methodologies to meet timing and power goals.
  • Perform sign-off and timing-closure across multiple corners and constraints.
  • Mentor senior and junior engineers and drive cross-team collaboration.

Skills

Floor planning
Placement optimization
Clock tree synthesis
Routing
Tcl scripting
Perl scripting
Communication skills

Education

Bachelor's or Master's Degree in Electrical/Electronics Engineering

Tools

ICC/ICC2
Innovus
Calibre

Job description

Job Description

Microchip’s CAD Physical Design (PD) team is looking for a Principal Engineer to work on Full Chip APR/Physical Implementation (Netlist-to-GDSII). In this role you will be working as part of a worldwide team in all areas of Physical Implementation including APR of hierarchical, low power, multi‑mode, multi‑corner mixed signal designs.

Requirements / Qualifications
  • Bachelor’s or Masters Degree in Electrical / Electronics Engineering with 10+ years of relevant experience.
  • Hands‑on experience in all aspects of physical design flows such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance and physical verification.
  • Advanced knowledge of place and route methodologies.
  • Recent experience with leading full chip Physical Design activities.
  • Advanced knowledge of VLSI logic principles, clock structures, and design timing closure.
  • Advanced knowledge of sign‑off tools for Static Timing Analysis, Formal Equivalence, Parasitic Extraction, Power Integrity, and Physical Verification is required.
  • Knowledge of and experience in UPF and Low Power design practices throughout entire physical design flow.
  • Daily use of ICC/ICC2 or Innovus is preferred.
  • Experience with 40nm or 28nm technologies is required; 16nm or smaller technology preferred.
  • Proficiency in Tcl and Perl scripting is essential.
  • Excellent written and verbal communication skills.
  • Excellent problem‑solving and debugging skills.
  • Self‑motivated team player that can collaborate with multiple teams across a geographically diverse company to achieve desired design goals is crucial.
Travel

0% – 25%

Physical Attributes
  • Hearing
  • Seeing
  • Talking
  • Works Alone
  • Works Around Others
Physical Requirements

80% sitting, 10% walking, 10% standing.

Equal Opportunity / Affidavit

Microchip Technology Inc. is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Principal Engineer – Physical Design
Principal Engineer – Physical Design

FHLB Des Moines • Chandler (AZ), Northern (KY)

Hybrid
USD 140,000 - 190,000
Senior Engineer II - Physical Design
Senior Engineer II - Physical Design

Microchip Technology Inc • Chandler (AZ)

On-site
USD 120,000 - 180,000
Principal Engineer - Layout
Principal Engineer - Layout

FHLB Des Moines • Allentown

On-site
USD 150,000 - 210,000
Principal Engineer - Layout
Principal Engineer - Layout

Microchip Technology • Allentown

On-site
USD 150,000 - 190,000
Senior Engineer I - Physical Design
Senior Engineer I - Physical Design

Microchip Technology Inc • Chandler (AZ)

On-site
USD 57,000 - 139,000
Principal Engineer - Layout
Principal Engineer - Layout

Microchip Technology Inc. • Allentown

On-site
USD 140,000 - 190,000
Senior Engineer II - Physical Design
Senior Engineer II - Physical Design

FHLB Des Moines • Arizona

On-site
USD 120,000 - 180,000
Principal Engineer, Full-Chip Physical Design
Principal Engineer, Full-Chip Physical Design

FHLB Des Moines • Chandler (AZ), Northern (KY)

Hybrid
USD 140,000 - 190,000
Principal Engineer - CAD (Physical Verification)
Principal Engineer - CAD (Physical Verification)

Microchip Technology Inc. • Chandler (AZ)

On-site
USD 120,000 - 180,000
Senior Engineer I - Physical Design
Senior Engineer I - Physical Design

Microchip Technology Inc. • Chandler (AZ)

On-site
USD 57,000 - 139,000
Health benefits starting on day one
Retirement savings plans
Quarterly bonus payments
+1