Lead High-Speed Analog IC Design Architect for AI

Celero Communications, Inc.; United States; Remote; USD 200,000 - 300,000; Full time

Job summary

Celero Communications, Inc. in Irvine, CA is seeking a Principal High-Speed Analog Circuit Design Engineer to architect and deliver high-speed analog circuits for next-generation optical transceivers and AI-scale interconnects.

You will lead design blocks, supervise layouts, verify circuits, bring-up silicon, and collaborate with a fast-growing team. A Master’s or PhD in EE with 5+ years of relevant experience is required. Excellent communication and technical documentation skills are essential.

Qualifications

• Master’s degree or PhD in Electrical Engineering or related field with 5+ years of experience.
• Strong analog design fundamentals for broadband amplification, clock generation, and/or fundamental analog blocks.
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction).
• Experience in advanced CMOS design and verification flows (self-heating, electromigration, safe operating area).
• Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or similar).
• Knowledge of electromagnetism, lumped models, and high-frequency design.
• Good understanding of analog layouts in FinFET and its impact on high-speed designs.
• Strong communication and documentation skills.

Responsibilities

• Design high-speed analog circuits for transceivers and related functions.
• Lead clock generation and distribution architectures (VCOs, PLLs, distribution).
• Develop fundamental analog blocks (bandgap references, LDOs, temp sensors).
• Develop new techniques for next-gen optical transceivers.
• Design custom passive components from concept to silicon implementation.
• Supervise analog layouts within advanced process nodes.
• Perform system verification and define circuit design specifications.
• Silicon bring-up, debugging, and support.
• Document designs and communicate with the team.

Skills

Analog design

Broadband amplification

Clock generation

System verification

Documentation skills

Education

Master's or PhD in EE

Tools

Virtuoso

Spectre

ADE

Post-layout extraction

EMX

Momentum

HFSS

Job description

Celero Communications, Inc. in Irvine, CA is seeking a Principal High-Speed Analog Circuit Design Engineer to architect and deliver high-speed analog circuits for next-generation optical transceivers and AI-scale interconnects.

You will lead design blocks, supervise layouts, verify circuits, bring-up silicon, and collaborate with a fast-growing team. A Master’s or PhD in EE with 5+ years of relevant experience is required. Excellent communication and technical documentation skills are essential.