Lead CPU Core Verification Testbench

Tenstorrent; Santa Clara (CA); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Tenstorrent is seeking a senior CPU verification engineer to own core-level testbench development for high‑performance out-of-order RISC-V cores. Hybrid role based in Austin, TX or Santa Clara, CA, with global collaboration across DV and post-silicon teams.

You will lead the CVM-based verification strategy, develop UVM and C++ models, and advance AI-assisted debugging workflows to accelerate issue triage and coverage. The position offers growth across multiple seniority levels.

Qualifications

• 8+ years in CPU verification or related digital design.
• Hands-on experience owning CPU core-level testbenches.
• Strong understanding of out-of-order microarchitecture.

Responsibilities

• Lead hands-on CPU core-level testbench development.
• Own CVM-based verification infrastructure and reusable components.
• Plan and drive functional verification for core features and ISA behavior.
• Develop UVM, assembly/C++ stimulus, and C++ models for RISC-V extensions and IOMMU/APIC.
• Debug regressions, improve coverage, and triage across sim, emu, and post-silicon environments.
• Build testbench tooling that uses Python and AI-assisted workflows.

Skills

CPU verification

Testbench development

UVM

CVM methodology

RTL debugging

Tools

Python

C/C++

Waveform analysis

Simulation tools

Job description

Tenstorrent is seeking a senior CPU verification engineer to own core-level testbench development for high‑performance out-of-order RISC-V cores. Hybrid role based in Austin, TX or Santa Clara, CA, with global collaboration across DV and post-silicon teams.

You will lead the CVM-based verification strategy, develop UVM and C++ models, and advance AI-assisted debugging workflows to accelerate issue triage and coverage. The position offers growth across multiple seniority levels.