Lead ASIC Verification for AI Accelerators

Engg; San Jose (CA); On-site; USD 219,000 - 351,000; Full time

Benefits offered by this job

Medical/Dental/Vision/401k

Inclusive rewards plan

Charitable giving match

Paid time off (4+ weeks) plus holidays

Job summary

Samsung Semiconductor seeks an experienced ASIC verification engineer to contribute to verification strategy and testbench development for AI accelerators. You will work with architects and design engineers to define verification plans, implement UVM components, and drive code and functional coverage closure.

Daily onsite work in San Jose or Folsom with collaboration across memory and storage teams. This role demands strong C++ and SystemVerilog skills and deep ASIC verification experience.

Qualifications

• BE/MS in Computer/Electrical Engineering or Computer Science with extensive ASIC verification experience.
• Experience in UVM and SystemVerilog for ASIC verification.
• Knowledge of DDR, HBM and related IP verification workflows.
• Strong communication and collaboration skills.

Responsibilities

• Verify modules and subsystems of AI accelerators across the verification plan.
• Architect test benches and create test plans; implement bench components in UVM.
• Execute verification activities and close functional and code coverage targets.
• Collaborate with architects and designers to define verification requirements and bring up post-silicon debug.

Skills

UVM

C++

SystemVerilog

ASIC verification

DDR/HBM verification

UCIe knowledge

HBM controller

Memory DFT

Verification flows

Problem solving

Education

BE/MS in Computer/Electrical Engineering or Computer Science

Tools

UCIe

HBM IP

IP verification

Job description

Samsung Semiconductor seeks an experienced ASIC verification engineer to contribute to verification strategy and testbench development for AI accelerators. You will work with architects and design engineers to define verification plans, implement UVM components, and drive code and functional coverage closure.

Daily onsite work in San Jose or Folsom with collaboration across memory and storage teams. This role demands strong C++ and SystemVerilog skills and deep ASIC verification experience.