Lead ASIC/SoC Architect: Build High-Performance Silicon

Chelsea Search Group; Minneapolis (MN); On-site; USD 140,000 - 190,000; Full time

Job summary

Chelsea Search Group seeks a Principal ASIC/SoC Architect & Design Engineer to drive architecture and RTL design for complex ASICs from concept to silicon. You will lead block-level specifications, collaborate with system architects, and work across verification, physical design, and business teams.

The role emphasizes hands-on design, PPA optimization, and mentoring junior engineers in a multi-site environment. Expertise in Verilog/SystemVerilog and EDA tools is essential.

Qualifications

• BSEE/MSEE or equivalent is required.
• 10+ years of direct industry experience with ASIC/SoC design.
• Proficiency with Synopsys Design Compiler and other EDA tools.
• Strong understanding of digital design principles.
• Familiarity with ARM/MIPS architectures.
• RTL based digital IC design using Verilog/SystemVerilog.
• Leadership and mentorship experience.

Responsibilities

• Lead architectural design of ASICs based on high-level requirements and block diagrams.
• Collaborate with system architects to define functionality, interfaces, and performance targets.
• Develop detailed specifications for chip components.
• Develop RTL designs and optimize code for area, power, and performance.
• Create timing constraints and work with physical design teams on place-and-route.
• Verify RISC processor conformance and optimize performance.
• Collaborate with physical design for floorplanning, placement, and routing.
• Assist verification teams with testbenches and functional checks.

Skills

RTL design

Synthesis

Constraint development

RISC architectures

Digital IC design

Verilog/SystemVerilog

C/C++

Python/TCL scripting

UNIX/Linux

Leadership

Mentoring

Education

BSEE/MSEE or equivalent

Tools

Synopsys Design Compiler

EDA tools

Job description

Chelsea Search Group seeks a Principal ASIC/SoC Architect & Design Engineer to drive architecture and RTL design for complex ASICs from concept to silicon. You will lead block-level specifications, collaborate with system architects, and work across verification, physical design, and business teams.

The role emphasizes hands-on design, PPA optimization, and mentoring junior engineers in a multi-site environment. Expertise in Verilog/SystemVerilog and EDA tools is essential.