Ingénieur Firmware SERDES Haute Vitesse – IP SoC

Cadence; Mount Royal (NJ); On-site; USD 110,000 - 170,000; Full time

Job summary

Cadence is seeking a High Speed SERDES PHY Firmware Design Engineer to join a dynamic team responsible for developing physical IP for high-speed serial-link protocols. The role includes architecture development, firmware implementation, and collaboration across verification, validation, and field deployment teams.

The ideal candidate has strong C/C++/Python skills, DSP knowledge, and a solid grounding in mixed-signal design.

Qualifications

• Solid programming knowledge in C/C++ and Python.
• Understanding of wireline communication principles.
• Knowledge in mixed signal circuit design and digital signal processing techniques.
• Strong problem solving and communication skills.
• BSc or MSc in Electrical Engineering.

Responsibilities

• Contribute to firmware architecture development and implementation of defined firmware features.
• Collaborate with verification team to debug and fix firmware issues found in verification simulations.
• Involve in post-silicon testing and validation to identify firmware/hardware issues and implement improvements.
• Interact with Product Engineering, System Validation and Design teams to debug IP issues in the field and provide hot fixes.
• Build system-level prototype control software to develop/validate adaptation, equalization, and control algorithms for high speed SERDES.
• Implement assigned firmware features and work with verification/validation teams to ensure functionality and robustness.
• Support Validation team during electrical and system characterization.
• Support Product Engineering during customer deployment of the IP.

Skills

C/C++

Python

Wireline communications

DSP

Problem solving

Education

BSc or MSc in Electrical Engineering

Job description

Cadence is seeking a High Speed SERDES PHY Firmware Design Engineer to join a dynamic team responsible for developing physical IP for high-speed serial-link protocols. The role includes architecture development, firmware implementation, and collaboration across verification, validation, and field deployment teams.

The ideal candidate has strong C/C++/Python skills, DSP knowledge, and a solid grounding in mixed-signal design.