High Speed PHY FW Engineer

Cadence Design Systems; San Jose (CA); On-site; USD 101,500 - 188,500; Full time

Job summary

Cadence Design Systems in California seeks a High Speed SERDES PHY Firmware Design Engineer to lead firmware tasks from architecture to deployment. You will work independently, drive features, and collaborate with verification and product teams to deliver robust IP solutions.

The role involves architecture, implementation, testing, and customer deployment, with a focus on high‑speed SERDES and associated DSP techniques.

Qualifications

• Solve firmware tasks with C/C++ and Python.
• Understand wireline communications principles.
• Know mixed-signal design and DSP techniques.
• BSc or MSc in Electrical Engineering.
• U.S. citizen or permanent resident.

Responsibilities

• Contribute during firmware architecture development and implementation of defined firmware features.
• Work closely with the verification team to debug and fix firmware issues found in simulation.
• Participate in post‑silicon testing and validation to identify firmware and hardware related functionality and performance issues, and implement necessary firmware improvements.
• Interact with Product Engineering, System Validation, and Design teams to debug IP issues in the field and provide hot fixes.
• Build system‑level prototype control software to develop and validate adaptation, equalization, and control algorithms for high‑speed SERDES.
• Implement assigned firmware features and collaborate with verification and validation teams to ensure functionality and robustness.
• Support the Validation team during electrical and system characterization.
• Support the Product Engineering team during customer deployment of the IP.

Skills

C/C++

Python

Firmware development

DSP concepts

Problem solving

Communication

Education

BSc in Electrical Engineering

MSc in Electrical Engineering

Job description

Position Details

High Speed SERDES PHY Firmware Design Engineer (T1/T2) – This role involves developing firmware for industry‑standard high‑speed serial link protocols. The successful candidate will work independently to complete assigned tasks and contribute to project leadership during all phases of firmware development, from architecture design to implementation, verification, testing, and customer deployment.

Responsibilities

• Contribute during firmware architecture development and implementation of defined firmware features.
• Work closely with the verification team to debug and fix firmware issues found in simulation.
• Participate in post‑silicon testing and validation to identify firmware and hardware related functionality and performance issues, and implement necessary firmware improvements.
• Interact with Product Engineering, System Validation, and Design teams to debug IP issues in the field and provide hot fixes.
• Build system‑level prototype control software to develop and validate adaptation, equalization, and control algorithms for high‑speed SERDES.
• Implement assigned firmware features and collaborate with verification and validation teams to ensure functionality and robustness.
• Support the Validation team during electrical and system characterization.
• Support the Product Engineering team during customer deployment of the IP.

Qualifications

• Solid programming knowledge in C/C++ and Python.
• Understanding of wireline communication principles.
• Knowledge of mixed‑signal circuit design and digital signal processing techniques.
• Strong problem‑solving and communication skills.
• BSc or MSc in Electrical Engineering.
• U.S. Citizen or Permanent resident.

Compensation and Benefits

The annual salary range for California is $101,500 to $188,500. You may also be eligible to receive incentive compensation, including bonuses, equity, and benefits. Benefits include paid vacation and paid holidays, a 401(k) plan with employer match, an employee stock purchase plan, and a variety of medical, dental, and vision plan options.

Equal Employment Opportunity

Cadence is committed to equal employment opportunity throughout all levels of the organization. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.