IC Package Design Engineer

Anysilicon; Austin, Northern (TX, KY); Hybrid; USD 140,000 - 210,000; Full time

Job summary

Apple is seeking a Package Design Engineer to lead the design and integration of advanced semiconductor packages for iPhone, iPad, Mac, Apple Watch, and Apple TV. You will optimize package architecture and advance design methodologies with automation and AI.

Responsibilities include physical layout, parasitic extraction, SI/PI modeling, and collaboration with Product Design and System Architecture teams to ensure top performance and manufacturability.

Qualifications

• BS degree in a relevant field and 10+ years of industry experience.
• Proven IC package physical design experience using Cadence Allegro or Mentor Xpedition.
• Strong understanding of high-speed interface constraints and SI/PI analysis.
• Experience with HFSS or PowerSI for simulations.
• Unix/Linux environment familiarity and scripting (Python, Perl, TCL).

Responsibilities

• Perform physical layout of package substrates for diverse silicon technologies (SoC, memory, RF, cellular).
• Conduct parasitic extraction and S-parameter modeling to meet SI/PI targets.
• Collaborate with Product Design and System Architecture to assess feasibility and optimize performance.
• Drive automated design and verification flows by evaluating new CAD tools.

Skills

High-speed I/O layout

Scripting (Python/Perl/TCL)

Unix/Linux proficiency

Education

BS degree in a relevant field

Tools

Cadence Allegro

Mentor Xpedition

HFSS

PowerSI

Job description

Apple's Packaging team is seeking a Package Design Engineer to lead the design and integration of advanced semiconductor packages for various products, including iPhone, iPad, Mac, Apple Watch, and Apple TV. This role focuses on optimizing package architecture and enhancing design methodologies through automation and AI.

Responsibilities:

• Perform physical layout of package substrates for diverse silicon technologies, including SoC, Memory, RF, and cellular ICs.
• Execute parasitic extraction and S-parameter modeling to ensure package designs meet SI/PI performance targets.
• Collaborate with cross-functional teams to assess package feasibility and optimize system performance, aligning with Product Design and System Architecture teams.
• Drive improvements in package design methodology by evaluating new CAD tools and developing automated design and verification flows.

Qualifications:

• BS degree in a relevant field and 10+ years of industry experience.
• Proven experience in IC package physical design using Cadence Allegro or Mentor Xpedition platforms.
• Strong understanding of high-speed interface layout constraints and SI/PI analysis, with experience in simulation tools like HFSS or PowerSI.
• Knowledge of substrate manufacturing processes, design rules, and design for manufacturability.
• Familiarity with Unix/Linux environments and proficiency in scripting languages such as Python, Perl, or TCL.