Hybrid VLSI ASIC Logic Design Engineer

Hewlett Packard Enterprise; Fort Collins (CO); Híbrido; USD 115.000 - 218.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Health & Wellbeing

Professional Development

Inclusive culture

Descripción de la vacante

Hewlett Packard Enterprise is seeking a VLSI ASIC Logic Design Engineer in Colorado for a hybrid role requiring in-office presence two days per week. You will design and verify VLSI components and hardware systems, determine architectures, and extend verification with SystemVerilog, SVAs, and formal methods.

You will collaborate with cross-functional teams to deliver reliable, cost-effective designs and mentor junior staff while advancing your expertise in RTL design, verification, and EDA tools.

Formación

• Bachelor's or Master's in Electrical Engineering or related field.
• 1-6 years of experience in VLSI design, verification, or implementation.
• Strong knowledge of digital logic, computer architecture, and VLSI concepts.
• Proficiency with HDLs and scripting for verification.

Responsabilidades

• Participates as an independent member of project team to develop VLSI prototypes and products.
• VLSI / RTL design using SystemVerilog.
• Create SystemVerilog Assertions (SVAs) and use Formal Verification.
• Write coverage and analyze verification holes.
• Collaborates with management and partners on design status and issues.

Conocimientos

RTL design

SystemVerilog

Formal Verification

VLSI design

Debugging

Verilog

Educación

Bachelor's or Master's in Electrical Engineering or related

Herramientas

SystemVerilog

UVM

SVAs

EDA tools

Descripción del empleo

Hewlett Packard Enterprise is seeking a VLSI ASIC Logic Design Engineer in Colorado for a hybrid role requiring in-office presence two days per week. You will design and verify VLSI components and hardware systems, determine architectures, and extend verification with SystemVerilog, SVAs, and formal methods.

You will collaborate with cross-functional teams to deliver reliable, cost-effective designs and mentor junior staff while advancing your expertise in RTL design, verification, and EDA tools.