Hybrid IP Verification Engineer – RTL/UVM

Intel Corporation

Hillsboro (OR)

Hybrid

USD 106,000 - 200,000

Full time

14 days+

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Benefits offered by this job

Hybrid work model
Competitive pay
Stock bonuses
Health benefits

Job summary

Intel Corporation in Hillsboro, Oregon is seeking an IP Design Verification Engineer to help develop RTL models and pre-silicon validation tests for next-generation silicon processes. You'll build scalable UVM testbenches and drive verification plans across blocks, subsystems, and SoCs.

You will collaborate with cross-disciplinary teams, apply SystemVerilog assertions, and contribute to power-aware verification and IP validation with IP providers.

Qualifications

  • Minimum 1+ year with Master’s or 3+ years with Bachelor’s in EE/CE or STEM field plus relevant experience.
  • Experience with pre-silicon logic validation using SystemVerilog and UVM.
  • Experience in digital design using Verilog/SystemVerilog and end-to-end validation.
  • Experience with SVA for coverage closure and with coverage-driven verification.

Responsibilities

  • Design and develop verification environments; build scalable UVM testbenches.
  • Own verification plans and drive coverage closure across projects.
  • Develop RTL and integrate logic into SoC architectures; validate IPs.
  • Apply power verification methodologies and debug pre-silicon failures.

Skills

UVM testbenches
SystemVerilog
Verilog
SVA (Assertions)
Python scripting
Digital design
RTL verification

Education

Master's in Electrical/Computer Eng
Bachelor's in Electrical/Computer Eng

Tools

UPF
Power verification tools
Simulation tools

Job description

Intel Corporation in Hillsboro, Oregon is seeking an IP Design Verification Engineer to help develop RTL models and pre-silicon validation tests for next-generation silicon processes. You'll build scalable UVM testbenches and drive verification plans across blocks, subsystems, and SoCs.

You will collaborate with cross-disciplinary teams, apply SystemVerilog assertions, and contribute to power-aware verification and IP validation with IP providers.

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