Hybrid Internship: System Technology Research Engineer

Intel; Hillsboro (OR); Hybrid; USD 142,000 - 143,000; Full time

Benefits offered by this job

Hybrid work model

Competitive intern compensation

Job summary

Intel is seeking a Research Engineer Intern to advance STCO methodologies and evaluate 3D/2.5D dis-aggregation schemes in memory and logic stacking. You will work across product architectures to push semiconductor processing and packaging frontiers.

The role involves developing system-level evaluations, collaborating with diverse teams, and applying your passion for innovation in a hybrid internship setting at Intel.

Qualifications

• Active Ph.D. candidacy in Electrical/ Electronics Engineering, Computer Architecture or related field.
• 1-2+ years research experience in system architecture modelling, digital circuit analysis, or VLSI layout.
• Familiarity with IC design tools like Cadence Virtuoso or Fusion Compiler.

Responsibilities

• Develop and enhance STCO methodologies for 3D/2.5D memory and logic integration.
• Perform system-level evaluations of devices, interconnects, materials and packaging schemes.
• Collaborate with diverse teams to drive innovation across applications.

Skills

Analytical skills

Collaboration

Communication

Adaptability

Time management

Education

Active Ph.D. candidacy

Tools

Cadence Virtuoso

Synopsis Fusion Compiler

Job description

Intel is seeking a Research Engineer Intern to advance STCO methodologies and evaluate 3D/2.5D dis-aggregation schemes in memory and logic stacking. You will work across product architectures to push semiconductor processing and packaging frontiers.

The role involves developing system-level evaluations, collaborating with diverse teams, and applying your passion for innovation in a hybrid internship setting at Intel.