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Job summary
A leading technology firm in Austin, Texas, is seeking a silicon design verification engineer to join their innovative team. You will perform verification planning, testbench development using UVM methodologies, and support both pre-silicon and post-silicon validation efforts. A strong background in HDLs and a Master's or PhD in Electrical or Computer Engineering are required. The company values diversity and offers a collaborative workspace for personal career growth.
Qualifications
Strong background with HDLs and HVLs.
Able to implement functional verification of mixed-signal ASICs.
Knowledge of signal processing and Verilog Assertions.
Responsibilities
Perform verification planning.
Testbench development using UVM methodologies.
Develop directed/constrained-random test generation.
Skills
HDL (e.g. Verilog, VHDL)
HVL (e.g. SystemVerilog/UVM)
Digital design and systems architecture
Education
MS or PhD in Electrical Engineering or Computer Engineering
Job description
A leading technology firm in Austin, Texas, is seeking a silicon design verification engineer to join their innovative team. You will perform verification planning, testbench development using UVM methodologies, and support both pre-silicon and post-silicon validation efforts. A strong background in HDLs and a Master's or PhD in Electrical or Computer Engineering are required. The company values diversity and offers a collaborative workspace for personal career growth.