HBM SoC Physical Design Engineer — MMMC Timing & Tapeouts

Micron Technology, Inc.; Folsom (CA); On-site; USD 103,000 - 210,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. in Folsom, CA seeks a SoC Physical Design Engineer to drive implementation from netlist to GDSII, ensuring top‑level integration and PPA targets. You will work with RTL, verification, DFT, IP, packaging, and manufacturing teams to enable robust signoff and successful tape-out.

The role emphasizes ownership of blocks, MMMC timing, and power integrity with opportunities to optimize flows using scripting and AI-enabled workflows.

Qualifications

• Requires strong experience in SoC physical design from netlist to GDSII on advanced nodes.
• Proficiency with Cadence/Synopsys/Siemens tools and standard signoff flows.
• Solid understanding of STA, clocking, constraints (SDC), and closure techniques.

Responsibilities

• Own physical implementation for SoC blocks/top-level, including floorplanning and routing to meet PPA targets.
• Drive timing closure across MMMC scenarios in collaboration with RTL, architecture, and STA teams.
• Coordinate signoff (DRC/LVS/EC, IR drop) and ensure manufacturability with DFT teams.
• Support tape-out execution and post-silicon debug with silicon-to-PD power analysis.

Skills

SoC physical design

Netlist to GDSII flow

Mentoring

Education

Bachelor’s or Master’s in Electrical Engineering or related field

Tools

Cadence Innovus

Cadence Tempus

Synopsys ICC2

PrimeTime

Calibre

Job description

Micron Technology, Inc. in Folsom, CA seeks a SoC Physical Design Engineer to drive implementation from netlist to GDSII, ensuring top‑level integration and PPA targets. You will work with RTL, verification, DFT, IP, packaging, and manufacturing teams to enable robust signoff and successful tape-out.

The role emphasizes ownership of blocks, MMMC timing, and power integrity with opportunities to optimize flows using scripting and AI-enabled workflows.