HBM SoC Design Architect & RTL Engineer

Micron Technology, Inc.; Folsom (CA); On-site; USD 79,000 - 175,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Retirement benefits

Job summary

Micron Technology, Inc. in the United States is seeking an HBM SoC Design Engineer/Architect to contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs.

You will work with experienced engineers across RTL design, verification, physical design and product engineering to deliver memory-centric SoCs that meet power, performance, and schedule objectives. We expect collaboration with architects and multi-functional teams to translate requirements into

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• Experience in digital design, ASIC/FPGA design, or related field.
• Knowledge of Verilog, SystemVerilog, VHDL, or similar HDL.
• Understanding of FSMs, pipelining, timing and synchronous logic.
• Strong analytical and communication skills for collaborative work.

Responsibilities

• Design, implement, and integrate RTL for next-generation HBM SoC solutions using Verilog or SystemVerilog.
• Collaborate with architects and multi-functional teams to translate requirements into microarchitectures and implementation plans.
• Support design-quality activities including simulation, synthesis, STA, CDC analysis, debugging, and design reviews.
• Evaluate power, performance, area, and timing tradeoffs to improve design quality.
• Develop automation solutions and leverage AI-assisted workflows to improve engineering productivity and verification efficiency.

Skills

Digital design

ASIC development

Verilog/SystemVerilog

FPGA design

Team collaboration

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

UVM

FPGA prototyping

Job description

Micron Technology, Inc. in the United States is seeking an HBM SoC Design Engineer/Architect to contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs.

You will work with experienced engineers across RTL design, verification, physical design and product engineering to deliver memory-centric SoCs that meet power, performance, and schedule objectives. We expect collaboration with architects and multi-functional teams to translate requirements into