HBM Design Architect (New Grad)

Micron Technology, Inc.; Richardson (TX); On-site; USD 100,000 - 130,000; Full time

Benefits offered by this job

Medical plan

Dental plan

Vision plan

Paid time off

Job summary

Micron Technology, Inc. seeks a New College Grad HBM Design Architect in Richardson, TX to contribute to evaluating future HBM/DRAM architectures. You will work with senior teams on performance, power, area, and reliability tradeoffs using modeling, simulations, and AI-assisted analysis.

Strong communication skills are essential for cross-functional reviews. The role supports AI/ML-driven architecture exploration and requires a Master’s or PhD in EE/CE, with exposure to CMOS, memory systems, and

Qualifications

• Master's or PhD completed before start date in EE/CE or related field.
• Strong foundation in CMOS, digital/mixed-signal design, memory systems, and architecture.
• Experience modeling, simulating, or analytically evaluating design tradeoffs.
• Ability to communicate complex results to multi-disciplinary teams.

Responsibilities

• Analyze HBM and DRAM architectures using models, simulations, and data-driven methods.
• Develop and apply modeling, simulation, and data-analysis methodologies for architecture exploration.
• Collaborate with architecture, circuit design, layout, packaging, and product teams on tradeoffs.
• Present findings and recommendations with clear assumptions, risks, and actions.

Skills

CMOS circuits

Digital design

Memory systems

Computer architecture

Signal integrity

Power delivery

Advanced packaging

Analytical skills

Written communication

Verbal communication

Education

Master's or Ph.D. in Electrical Engineering or Computer Engineering

Tools

HSPICE

FineSim

Spectre

Job description

Micron Technology, Inc. seeks a New College Grad HBM Design Architect in Richardson, TX to contribute to evaluating future HBM/DRAM architectures. You will work with senior teams on performance, power, area, and reliability tradeoffs using modeling, simulations, and AI-assisted analysis.

Strong communication skills are essential for cross-functional reviews. The role supports AI/ML-driven architecture exploration and requires a Master’s or PhD in EE/CE, with exposure to CMOS, memory systems, and