Hands-on In-Fab Wafer Test Engineer – RF/MW (On-Site)

Anite

Santa Rosa (CA)

On-site

USD 95,000 - 158,000

Full time

3 days ago
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Job summary

Keysight in Santa Rosa, CA seeks an In‑Fab Wafer Test Engineer to craft on‑wafer DC, microwave, and millimeter‑wave measurements for PCM devices. You will work closely with Integration, Process, NTI, Design, and other Test Engineers to ensure data integrity and support lot health.

The role requires hands‑on work in a fast‑paced environment, with a focus on developing test plans, validating circuits, and improving measurement algorithms to accelerate wafer testing cycles.

Qualifications

  • 4+ years of experience in testing and troubleshooting RF, analog, and digital circuits.
  • Understanding of microwave measurements.
  • Understanding of Semiconductor Device Processing.
  • Understanding of Semiconductor Device Physics.
  • Experience using electrical test instrumentation or automated test.
  • Ability to work on rapidly paced projects.
  • Excellent interpersonal, problem solving, and communication skills.

Responsibilities

  • Elicit test requirements from Process, New Technology, Integration, and Design Engineers.
  • Modernize and implement new test infrastructure.
  • Debug test software and algorithm bugs/issues.
  • Advise on and select test equipment and measurement algorithms.
  • Design and develop RF and DC test plans.
  • Test and validate circuits and test plans.
  • Iteratively improve and optimize.
  • Investigate and resolve issues.
  • Streamline wafer pass/fail decisions.

Education

Bachelor’s degree in Electrical Engineering or equivalent

Tools

SPECS Test Framework

Job description

Keysight in Santa Rosa, CA seeks an In‑Fab Wafer Test Engineer to craft on‑wafer DC, microwave, and millimeter‑wave measurements for PCM devices. You will work closely with Integration, Process, NTI, Design, and other Test Engineers to ensure data integrity and support lot health.

The role requires hands‑on work in a fast‑paced environment, with a focus on developing test plans, validating circuits, and improving measurement algorithms to accelerate wafer testing cycles.

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