FPGA Verification Engineer II: RTL & Testbench Expert

RTX; Fort Wayne (IN); On-site; USD 69,000 - 131,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Three weeks of vacation for newly hire

Generous 401(k) with matching

Tuition reimbursement

Student Loan Repayment Program

Life insurance and disability coverage

Parental leave benefits

Employee assistance program

Job summary

RTX in Fort Wayne, IN, is seeking an experienced Electrical or Computer engineer for testbench design, implementation, and verification of high-performance digital ASICs and FPGAs used in signal processing and information assurance products on the Microelectronics Technology team. The candidate will be onsite in Fort Wayne, IN.

Responsibilities include verification environment architecture using SystemVerilog with OVM/UVM, test plan creation, and testbench development for RTL blocks using

Qualifications

• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 2 years of prior relevant experience or an Advanced Degree in a related field
• Active and transferable U.S. government issued security clearance is required prior to start date
• U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
• RTL coding and simulation in VHDL or Verilog
• Testbench development for the verification of RTL blocks using VHDL and/or SystemVerilog
• Familiarity with best practice chip-level verification techniques and languages (e.g.constrained random, functional coverage,SystemVerilog)
• Familiarity with revision control concepts and tools (e.g.Git,Subversion)

Responsibilities

• Verification environment architecture and design using SystemVerilog with OVM/UVM
• Creation of written test plan, test cases, code coverage tracking, and functional coverage tracking
• Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
• Contribute to engineering estimates for new program pursuits
• Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status

Skills

SystemVerilog

VHDL

RTL verification

Testbench

Git/Subversion

C/C++

Unix scripting

QuestaSim

Vivado

Education

STEM degree

Tools

QuestaSim

Synplify

Quartus

Vivado

Git/Subversion

Job description

RTX in Fort Wayne, IN, is seeking an experienced Electrical or Computer engineer for testbench design, implementation, and verification of high-performance digital ASICs and FPGAs used in signal processing and information assurance products on the Microelectronics Technology team. The candidate will be onsite in Fort Wayne, IN.

Responsibilities include verification environment architecture using SystemVerilog with OVM/UVM, test plan creation, and testbench development for RTL blocks using